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10 Commits (d20e6048647c24c92f5a4f049b375dabb0012a8c)

Author SHA1 Message Date
Ionut Podgoreanu 214cf5896e library/common: Enable automatic logging of simulation output 2022-08-10 12:00:15 +03:00
Ionut Podgoreanu 79579f65df library/common: Update the packing IPs to be more generic 2022-08-10 12:00:15 +03:00
Iulia Moldovan 0c0617d49e libraries: Update modules according to guideline 
* Added header license for the files that didn't have
* Modified parentheses
* Removed extra spaces at the end of lines
* Fixed parameters list to be each parameter on its line
* Deleted lines after endmodule and consecutive empty lines
* Fixed indentation

Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>
 2022-06-28 18:06:56 +03:00
stefan.raus 3c07861ee8 generate_xml.sh: Replace < and > in error message 
Replace < with &lt; and > with &gt; in ERRS to not broke created xml.

Signed-off-by: stefan.raus <stefan.raus@analog.com>
 2021-11-03 15:22:45 +02:00
Istvan Csomortani 6565c5d018 library/tb: Improve run_tb.sh 2021-10-18 16:13:31 +03:00
stefan.raus 37238916df Testbenches: Unify and optimize HDL testbenches 
Create a common 'run_tb.sh' script to be called by every testbench.
Unify file and testbenches names.
Fix util_pack/cpack_tb.
Add parameters '-batch' and '-gui' for modelsim and xsim simulators (default is gui)
Add ascript for that generates output in xml format (used by CI tools).
 2021-05-07 19:53:14 +03:00
Laszlo Nagy e909962fb0 common/ad_upack: Generic unpacker core and testbench 
Unpacker:
   - unpack O_W number of data units from I_W number of data units
   - data unit defined in bits by UNIT_W e.g 8 is a byte
 2021-02-05 15:24:15 +02:00
Laszlo Nagy b4ebd4357f common/ad_pack: Generic packer core and testbench 
Packer:
   - pack I_W number of data units into O_W number of data units
   - data unit defined in bits by UNIT_W e.g 8 is a byte
 2021-02-05 15:24:15 +02:00
Laszlo Nagy 0badfdfa31 ad_mux: fix cases where channel number is not power of mux size 2020-11-27 09:45:11 +02:00
Laszlo Nagy 5c561665b0 common/ad_mux: Pipelined mux, rtl and TB 
Build a large mux from smaller ones defined by the REQ_MUX_SZ parameter
 Use EN_REG to add a register at the output of the small muxes to help
 timing closure.
 2020-11-27 09:45:11 +02:00