Commit Graph

8 Commits (d374f5b09192ec2b274280a62555fcd813f7bd5a)

Author SHA1 Message Date
Istvan Csomortani 1c23cf4621 all: Update verilog files to verilog-2001 2017-04-13 11:59:55 +03:00
Istvan Csomortani e30a80fda0 daq1_spi: Delete device specific macro instantiation 2016-12-06 15:24:21 +02:00
Adrian Costina 977d9d0624 Merge branch 'hdl_2015_r2' into dev
Conflicts:
	projects/daq1/common/daq1_spi.v
2016-03-02 13:52:15 +02:00
Adrian Costina 40fb68dfd5 ad9265, ad9434, ad9467, daq1, daq2, daq3, fmcadc2, fmcadc4, fmcadc5, fmcjesdadc1, fmcomms6, fmcomms7, usdrx1: updated common spi module so that spi streaming is possible 2016-03-02 13:39:37 +02:00
Istvan Csomortani c0a559a9b1 daq1: Fix some typos in the SPI wrapper 2016-02-24 14:31:56 +02:00
Istvan Csomortani c32d7147d5 daq1 : There is a single CSN from master 2016-02-12 14:38:32 +02:00
Istvan Csomortani 8c69c9d2ce daq1_zc706 : Update the project
+ Add AD9684 to the block design
+ Update the IO definitions
+ Update the CPLD design
+ Add 3wire SPI logic
2016-01-19 11:20:35 +02:00
Istvan Csomortani ee752ec08a daq1: Initial commit 2014-09-01 18:34:31 +03:00