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3856 Commits (d4c9f1e9f10b1525c9897677f65da84770ac11d6)

Author SHA1 Message Date
AndreiGrozav a026d44435 axi_generic_adc: Add missing up_adc_common connections 2016-10-12 13:20:26 +03:00
AndreiGrozav b543402051 axi_mc_current_monitor: Add missing up_axi connection 2016-10-12 13:20:26 +03:00
AndreiGrozav 91995c082d axi_ad9684: Fixed up_drp_*data width 2016-10-12 13:20:26 +03:00
AndreiGrozav a505d304af Add up_dac_common missing connections 2016-10-12 13:20:26 +03:00
AndreiGrozav 43ee917d53 Add up_dac_channel missing connections 2016-10-12 13:20:26 +03:00
AndreiGrozav 1131be91ed axi_ad9361: Makefile update 2016-10-11 23:34:13 +03:00
AndreiGrozav b7767aa18f xilinx/axi_ad9361_lvds_if: Remove ila 2016-10-11 18:13:45 +03:00
AndreiGrozav 2d93d787ab altera/ad_cdfilter: Update interface to Verilog 2001 standard 2016-10-11 17:59:21 +03:00
AndreiGrozav 369dad60b0 axi_ad9361: Add Altera SERDES interface support 2016-10-11 17:59:19 +03:00
AndreiGrozav ae47895666 altera/alt_serdes: Fixed SERDES 4 factor initialization 2016-10-11 17:59:17 +03:00
AndreiGrozav d41945f568 altera/ad_serdes: Add support for any SERDES factor less than 8 2016-10-11 17:59:14 +03:00
AndreiGrozav 52194f0fea axi_ad9361: Add DRP connection to the interface module 2016-10-11 17:59:12 +03:00
AndreiGrozav 7194d2eccc axi_ad9361: Grup interfaces to add support for more carriers 2016-10-11 17:58:49 +03:00
Rejeesh Kutty 5bb77109ca daq2/a10gx- make fix 2016-10-10 13:03:44 -04:00
Rejeesh Kutty 905e29eb01 hdlmake- altera 2016-10-10 12:55:55 -04:00
Rejeesh Kutty e5cf417576 daq2/mb- xcvr procedures 2016-10-10 12:51:30 -04:00
Rejeesh Kutty 273073a584 daq2/kcu105- xcvr procedure 2016-10-10 11:12:47 -04:00
Rejeesh Kutty cc6ca4f0f2 ad_lvds_in- ultrascale sim device 2016-10-10 10:39:47 -04:00
Adrian Costina b3d3876dc5 imageon: ZC706, updated system_top to remove part of the Warnings. 
- constraints fixed so Vivado doesn't issue a Warning
 2016-10-10 17:33:42 +03:00
Adrian Costina 9efc45f0b6 imageon: Zed, updated system_top to remove part of the Warnings. 
- spi csn signals should be tied to 1 if spi is not used
- constraints fixed so Vivado doesn't issue a Warning
 2016-10-10 17:31:25 +03:00
Adrian Costina 121b341b45 axi_spdif_rx: Fixed version register issue. Added sampled_data to sensitivity list 2016-10-10 17:30:13 +03:00
Adrian Costina 8875c5bef3 fmcomms6: ZC706, updated system_top to remove part of the Warnings 2016-10-10 16:43:23 +03:00
Istvan Csomortani ff980551e6 ad_serdes: SERDES_FACTOR handover missing 
In modules ad_serdes_in/ad_serdes_out the handover of the parameter
SERDES_FACTOR did not exist, causing unwanted behavioral in case of
factors less than 8.
SERDES_FACTOR must be hand over to DATA_WIDTH parameter of the SERDES
primitive.
 2016-10-10 16:38:42 +03:00
Istvan Csomortani f34aa67029 axi_hdmi: Fix a typo 2016-10-10 16:22:18 +03:00
Istvan Csomortani fcd56a2f90 daq3/a10gx: Update project to the new GT framework 
- Update common script
- Update system_top, some port names were changed
- Update constraint files
 2016-10-10 16:22:08 +03:00
Istvan Csomortani 15f36af4c2 axi_ad9152: Update core to support Altera platforms 2016-10-10 16:21:49 +03:00
Adrian Costina 94f55f20e9 adv7511: KCU105, updated system_top to remove part of the Warnings 2016-10-10 16:12:17 +03:00
Adrian Costina f464497062 cn0363: Microzed, updated system_top to remove part of the Warnings 2016-10-10 16:08:59 +03:00
Adrian Costina 2e605fc060 cn0363: Zed, update system_top to remove part of the Warnings 2016-10-10 15:56:46 +03:00
Adrian Costina a12d34a98b adv7511: Zed, updated system_top to remove part of the Warnings 2016-10-10 15:54:34 +03:00
Adrian Costina c737afebf8 adv7511: KC705, updated system_top to remove part of the Warnings 2016-10-10 13:24:40 +03:00
Adrian Costina 74faac9210 ad9467_fmc: KC705, updated system_top to remove part of the Warnings 2016-10-10 13:19:55 +03:00
Adrian Costina 111adac825 axi_usb_fx3: Updated core 
- trig signal will reset state machine
- slrd_n delay will be absorbed by the axi_usb_fx3_if module, when Xilinx DMA is not ready to receive data during a packet
- fx32dma_eop signals when the FX3 DMA buffer should be empty. slrd_n set high and sloe_n set low for another two clock cycles
- eot_fx32dma signals the interface that the packet has been fully transfered. No need for watermark signals
- added length_fx32dma and length_dma2fx3 as requested
 2016-10-10 10:33:37 +03:00
Rejeesh Kutty ffaf78665f daq2- xcvr procedures 2016-10-06 14:44:20 -04:00
Rejeesh Kutty 3b55822db3 daq2- xcvr connect 2016-10-06 14:09:27 -04:00
Rejeesh Kutty 721ee98a06 zcu102- misc fixes 2016-10-06 10:18:14 -04:00
Istvan Csomortani 8965bcffb7 make: Update make files for DAQ3 2016-10-06 10:27:00 +03:00
Istvan Csomortani 9ace02a227 daq3/a10gx: Update project to the new GT framework 2016-10-06 10:25:25 +03:00
Istvan Csomortani 58c4abd8af daq3/kcu105: Update project to the new GT framework 2016-10-06 10:23:52 +03:00
Rejeesh Kutty ca4dca87e2 daq2- updates 2016-10-05 14:02:59 -04:00
Rejeesh Kutty baabe20766 common/zcu102- spi connections & clock 2016-10-05 14:01:59 -04:00
Rejeesh Kutty 39fdf11ef3 util_adxcvr- rx/tx clocks 2016-10-05 13:53:02 -04:00
Istvan Csomortani 7ec93ce8e0 util_adxcvr: Fix some typo 
GTHE4_CHANNEL is instantiated in case of XCVR_TYPE == 2
 2016-10-05 17:42:12 +03:00
Istvan Csomortani 4f587d2e48 util_adxcvr: Delete trailing whitespaces 2016-10-05 17:41:40 +03:00
Istvan Csomortani bab9b2df0b daq3/zc706: Update project with the new transceiver modules 2016-10-05 17:41:25 +03:00
Istvan Csomortani 1b9d2d434c axi_ad9361_tdd: Delete unused register 2016-10-05 17:41:08 +03:00
Adrian Costina c196b5bf68 ad6676evb: VC707, fixed system top gpio_bd datawidth 2016-10-05 15:50:43 +03:00
Adrian Costina ddceff2b5c axi_usb_fx3: Updated header/footer signature 2016-10-04 16:11:24 +03:00
Rejeesh Kutty 48dd4880a3 util_adxcvr- ultrascale+ initial commit 2016-10-03 16:11:45 -04:00
Rejeesh Kutty 0e8551545c util_adxcvr- ultrascale+ initial commit 2016-10-03 16:11:45 -04:00