Commit Graph

2260 Commits (dd4892932771047010c5901a00eaa9898c6f23e0)

Author SHA1 Message Date
Rejeesh Kutty dd48929327 hdlmake.pl - updates 2017-06-06 12:25:35 -04:00
Rejeesh Kutty 5176e427a1 common/a10soc- add project create tcl procedure 2017-06-06 12:24:13 -04:00
Rejeesh Kutty f278b6e6c9 adrv9371x/a10soc- constraints/project updates 2017-06-06 12:23:26 -04:00
Rejeesh Kutty e34057c2b2 adrv9371x/a10gx- constraints/project updates 2017-06-06 12:22:31 -04:00
Rejeesh Kutty e9c49f667f altera- 16.1.2 & a10soc 2017-06-06 12:20:44 -04:00
Adrian Costina 578ccaaa44 adrv9371x:a10gx, update create project command and Makefile 2017-06-06 17:30:12 +03:00
Adrian Costina 54a53c015a scripts: changed adi_project_create command to adi_project_altera 2017-06-06 17:29:12 +03:00
Adrian Costina 0d99aa02e1 m2k: Updated project to work with the fifo_depth related changes 2017-06-06 15:37:23 +03:00
Istvan Csomortani 491602d88b make: Update make files 2017-06-06 12:00:40 +03:00
Rejeesh Kutty 6df97a61ae adrv9364z7020- fix enable/en_agc mixup 2017-06-05 16:06:27 -04:00
Rejeesh Kutty eadbf9ae30 altera- remove default assignments from procedure 2017-06-05 15:25:38 -04:00
Rejeesh Kutty 0bd22e78d9 altera- adi-project-create version 2017-06-05 15:24:35 -04:00
Rejeesh Kutty 1b1c7ffa61 adi_project- altera version 2017-06-05 15:13:21 -04:00
Istvan Csomortani 50cdb6db67 Merge branch 'jesd204' into dev 2017-05-31 20:44:32 +03:00
Istvan Csomortani 84b2ad51e2 license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
Rejeesh Kutty 2d56141bbd altera- 2017-r1 16.1.2 2017-05-30 12:21:27 -04:00
Istvan Csomortani 85ebd3ca01 license: Update license terms in hdl source files
Fix a few gramatical error, fix the path of the top level license
files.
2017-05-29 09:55:41 +03:00
Istvan Csomortani 669e0a01d0 fmcomms2/a10gx: Remove project 2017-05-26 17:05:55 +03:00
Istvan Csomortani 3c47d00a96 daq1/a10gx: Remove project 2017-05-26 17:05:28 +03:00
Istvan Csomortani 414943db4b m2k: Fix Make files 2017-05-26 09:54:08 +03:00
Istvan Csomortani c4fa41e4e5 adrv9364z7020: Update README 2017-05-25 17:47:58 +03:00
Istvan Csomortani 3af00dc520 adrv9361z7035: Update README 2017-05-25 17:47:19 +03:00
Istvan Csomortani 9ecfcce4ec adrv9364z7020: Rename pzsdr1 to adrv9364z7020 2017-05-25 17:20:23 +03:00
Istvan Csomortani 26822af7e1 adrv9361z7035: Rename pzsdr2 to adrv9361z7035 2017-05-25 17:17:54 +03:00
Istvan Csomortani 4c998d1e18 make: Update make files 2017-05-25 15:12:17 +03:00
Adrian Costina f9057b1825 m2k: Add scale correction option. Update parameters 2017-05-24 15:59:24 +03:00
Lars-Peter Clausen 4d00439d52 fmcomms11: Convert to ADI JESD204
Convert the FMCOMMS11 project to the ADI JESD204 link layer cores. The
change is very straight forward, but a matching change on the software side
is required.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-05-23 11:16:07 +02:00
Lars-Peter Clausen d4c9f1e9f1 fmcjesdac1: Convert to ADI JESD204
Convert the FMCJESDADC1 project to the ADI JESD204 link layer core. The
change is very straight forward, but a matching change on the software side
is required.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-05-23 11:16:07 +02:00
Lars-Peter Clausen 9a917ae8bf fmcadc4: Convert to ADI JESD204
Convert the FMCADC4 project to the ADI JESD204 link layer core. The change
is very straight forward, but a matching change on the software side is
required.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-05-23 11:16:07 +02:00
Lars-Peter Clausen bbe457acea fmcadc2: Convert to ADI JESD204
Convert the FMCADC2 project to the ADI JESD204 link layer core. The change
is very straight forward, but a matching change on the software side is
required.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-05-23 11:16:07 +02:00
Lars-Peter Clausen a38bbb7eb4 daq3: Convert to ADI JESD204
Convert the DAQ3 project to the ADI JESD204 link layer cores. The change is
very straight forward, but a matching change on the software side is
required.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-05-23 11:16:07 +02:00
Lars-Peter Clausen 0ec92d3153 daq2: Convert to ADI JESD204
Convert the DAQ2 project to the ADI JESD204 link layer cores. The change is
very straight forward, but a matching change on the software side is
required.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-05-23 11:16:07 +02:00
Lars-Peter Clausen a7e72245ff adrv9371: Convert to ADI JESD204 core
Convert the ADRV9371 project to the ADI JESD204 link layer cores. The
change is very straight forward, but a matching change on the software side
is required.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-05-23 11:16:07 +02:00
Lars-Peter Clausen 5ca79e843c ad6676evb: Convert to ADI JESD204
Convert the AD6676EVB project to the ADI JESD204 link layer core. The
change is very straight forward, but a matching change on the software side
is required.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-05-23 11:16:07 +02:00
Lars-Peter Clausen 0a72693d4d adi_board.tcl: ad_xcvrcon: Handle ADI JESD204 core
Let the ad_xcvrcon handle the ADI JESD204 link layer cores. The function
will detect the JESD204 core vendor and connect the appropriate signals
based on it. This means it can still be used with the Xilinx JESD204 core
as well.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-05-23 11:16:07 +02:00
Lars-Peter Clausen 9e8d35b6e6 adi_board.tcl: ad_cpu_interconnect: Handle hierarchies
When trying to use ad_cpu_interconnect to connect to a AXI interface that
is a outer port of a hierarchy this will fail at the moment as it kind find
the matching clock and reset signals.

Add support for traversing into the hierarchy and find the final target AXI
port inside the hierarchy. Then find the matching clock and reset and
traverse them back the corresponding hierarchy outer ports.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-05-23 11:16:07 +02:00
Lars-Peter Clausen 01aea161fa Create CDC helper library
Move the CDC helper modules to a dedicated helper modules. This makes it
possible to reference them without having to use file paths that go outside
of the referencing project's directory.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-05-23 11:16:07 +02:00
Rejeesh Kutty 3db1050e91 pzsdr2/ccfmc: enable eth1 mdio 2017-05-22 13:38:36 -04:00
Rejeesh Kutty f09b902609 usdrx1- spi/mlo fixes 2017-05-22 13:22:44 -04:00
Adrian Costina 12930c8470 motcon2_fmc: Explicitly assign ETH0 MDIO to EMIO 2017-05-22 18:53:00 +03:00
Rejeesh Kutty 0eaa98370e fmcadc2/vc707- spi clock reg can't be on iob 2017-05-19 15:22:33 -04:00
Rejeesh Kutty eb7171e212 daq3/kcu105- reorder refclk constraints 2017-05-19 11:41:45 -04:00
Rejeesh Kutty 36037a76f8 kcu105- vivado now depends on order of constraints? 2017-05-19 11:21:36 -04:00
Rejeesh Kutty 0b3b1e6c76 kcu105- remove ethernet delay ctrl false path 2017-05-19 11:21:36 -04:00
Lars-Peter Clausen e033d6c48e m2k: Refresh Makefile
The util_cpack core is currently not used by the M2K project. Refresh the
Makefiles to reflect this.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-05-19 15:33:26 +02:00
Rejeesh Kutty f3959cb5b9 zcu102- 2016.4 updates 2017-05-18 14:17:20 -04:00
Rejeesh Kutty 4f0accbbfa adrv9371x fix dacfifo name 2017-05-18 12:54:14 -04:00
Rejeesh Kutty d507cd0c9a quartus optimization for frequency 2017-05-18 11:34:29 -04:00
Rejeesh Kutty ff7dc41066 alt-jesd- constraints update 2017-05-18 09:55:24 -04:00
Rejeesh Kutty d10faabc3f a10soc- 16.1- hsp sdram reset 2017-05-17 16:30:37 -04:00