Adrian Costina
1c9b41db6f
fmcjesdadc1: A5GT project, added modular sgdma for Ethernet, nios configured for linux
2015-05-08 14:51:24 +03:00
Adrian Costina
dc2b37bd0c
Makefile: Added top level Makefile. Modified behavior of clean and clean-all
...
Clean ran for a project will clean only the project files.
Clean-all ran for a project will clean also the library files on which the project depends.
The clean commands will only remove specific files and directories.
The top Makefile allows several options(per suggestion from jameyhicks):
make fmcomms1.zed will run "make all" in projects/fmcomms1/zed/
make clean will run "make clean" for all the projects
make clean-all will run "make clean" for all the projects and libraries
make lib will run "make all" for the library files
2015-04-17 17:22:38 +03:00
Adrian Costina
374f82e7de
makefiles: The clean command for library won't remove the xml files, except for component.xml.
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Updated also the dmac dependencies
2015-04-16 11:53:27 +03:00
Adrian Costina
780455d68c
Makefile: Updated makefiles. Added makefiles for altera
2015-04-09 17:57:06 +03:00
Rejeesh Kutty
5f8e9a74ea
makefile: updated
2015-04-07 16:32:01 -04:00
Rejeesh Kutty
0a8823361f
fmcjesdadc1/a5gt: 14.1 updates
2015-04-03 14:54:57 -04:00
Rejeesh Kutty
3aac5f9494
fmcjesdadc1/a5gt: 14.1 updates
2015-04-03 14:54:55 -04:00
Adrian Costina
f79a152958
Makefiles: updated all makefiles adding clean functionality
2015-04-03 11:57:54 +03:00
Rejeesh Kutty
b7d72a5b2e
makefile: added
2015-04-01 16:29:16 -04:00
Adrian Costina
9672271155
fmcjestadc1: a5gt: Updated project to work with linux and fixed ethernet
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- added phy reset mechanism for proper functioning of the ethernet
- not all DDR is accesible, as NIOS2 can't access it with MMU enabled
2015-01-23 13:30:56 +02:00
Adrian Costina
6ac774a9dd
fmcjesdadc1: Update altera system_timing script
2014-12-10 17:53:29 +02:00
Lars-Peter Clausen
50faf0c53a
Remove executable flags from non-exectuable files
2014-09-09 15:05:06 +02:00
Rejeesh Kutty
cb29b83b05
a5gt: updates to match a5gt
2014-08-25 10:46:59 -04:00
Rejeesh Kutty
33979fc533
fixes to improve timing - fifo for clock domain transfers
2014-04-04 13:49:53 -04:00
Rejeesh Kutty
6a19b34a00
a5gt: added tightly coupled memory
2014-04-03 20:50:17 -04:00
Rejeesh Kutty
12e5cc91bd
make signaltap/timing part of the flow
2014-04-03 20:50:15 -04:00
Rejeesh Kutty
e85153b5dd
altera hal version
2014-04-01 21:12:11 -04:00
Rejeesh Kutty
04df908fbf
altera-fmcjesdadc1 initial checkin
2014-04-01 12:01:57 -04:00
Rejeesh Kutty
0d678b89ed
altera a5gt fmcjesdadc1 setup
2014-04-01 11:46:37 -04:00