Rejeesh Kutty
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71b5004b25
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projects- drp moved to up-clock domain
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2015-06-01 14:57:59 -04:00 |
Adrian Costina
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e332fa01c8
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ad6676evb, daq2, fmcadc2, fmcjesdadc1, usdrx1: Updated jesd reset connection
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2015-04-30 12:11:46 +03:00 |
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Adrian Costina
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c7e4ba5083
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fmcjesdadc1: Updated KC705 to the latest flow
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2015-03-30 18:07:47 +03:00 |
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Adrian Costina
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ccf0542218
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fmcjesdadc1: Connected constant 0 to unconnected inputs
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2015-03-26 12:08:14 +02:00 |
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Adrian Costina
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d418c9f9b1
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fmcjesdadc1: Updated project to new flow. Updated ZC706 design
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2015-03-24 10:38:14 +02:00 |
Michael Hennerich
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138e789fb6
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projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl: Fix interrupts
sys_concat_intc: don't reset NUM_PORTS to 6
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
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2014-12-09 17:38:16 +01:00 |
Istvan Csomortani
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b0f571ce0c
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fmcjesdadc1: Fix parameter lane number for GT core
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2014-11-21 19:17:29 +02:00 |
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Istvan Csomortani
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57137df018
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fmcjesdadc1_zc706: Interrupt update
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2014-11-03 13:02:09 +02:00 |
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Istvan Csomortani
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17675863e0
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all_projects: Fix the interrupt connections to preserve IRQ layout
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2014-10-22 11:48:08 +03:00 |
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Istvan Csomortani
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02802644bf
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fmcjesdadc1: Fix a few warning and issue with ILA
+ GPIO width is 15
+ Fix ILA core
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2014-10-15 15:37:05 +03:00 |
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Istvan Csomortani
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6f77af4aff
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fmcjesdadc1: Upgrade project to 2014.2
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2014-10-09 18:55:27 +03:00 |
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Istvan Csomortani
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2ce7695bf7
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fmcjesdadc1: Initial commit of VC707 version
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2014-09-01 18:47:01 +03:00 |
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Istvan Csomortani
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9a80fec4e4
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fmcjesdadc1: Delete trailing whitespaces
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2014-09-01 18:45:20 +03:00 |
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Rejeesh Kutty
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5f21f54463
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fmcjesdadc1: zc706 version
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2014-08-25 14:28:57 -04:00 |
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Rejeesh Kutty
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76ffb939e5
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zc706: ad9625 copy
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2014-08-22 11:24:24 -04:00 |