e6d9735e54
fmcomms1: Fixed zed top file, the DAC dma was not correctly connected
2015-06-17 14:43:34 +03:00
a6cae6b477
iobuf: do is a system verilog keyword
2015-05-21 14:06:17 -04:00
6b9906b22b
Refresh Makefiles
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Re-generate the Makefiles after a small update to the generation script:
- Entries are sorted alphabetically
- Empty dependency lines are skipped
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-21 14:21:54 +02:00
c19749361d
Makefiles: Updated makefiles to have as a result the programming file instead of the project file.
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Also fixed altera projects dependencies
2015-05-18 17:22:46 +03:00
91279253ef
Makefiles: Added mig project file as a dependency for Microblaze based projects. Also updated usdrx1 a5gt Makefile
2015-05-08 15:31:40 +03:00
949abcdc8f
Makefile: Updated makefiles so that the project recipe does not depend on lib
2015-05-06 14:58:29 +03:00
4f75414a1a
fmcomms1: Removed constraints that are not needed
2015-05-05 23:39:08 +03:00
1fcaf8fb63
fmcomms1: Updated AC701 project to meet timing. Reduced FIFO size for AD9643 DMA to 8
2015-05-05 23:37:01 +03:00
3fdda617a4
fmcomms1: updated common, changed DMAC fifo size and wfifo reset signal source
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- changed DMAC FIFO size to 16, as it should be large enough
- connected wfifo reset to adc_rst from axi_ad9643 core
2015-04-28 14:58:04 +03:00
dc2b37bd0c
Makefile: Added top level Makefile. Modified behavior of clean and clean-all
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Clean ran for a project will clean only the project files.
Clean-all ran for a project will clean also the library files on which the project depends.
The clean commands will only remove specific files and directories.
The top Makefile allows several options(per suggestion from jameyhicks):
make fmcomms1.zed will run "make all" in projects/fmcomms1/zed/
make clean will run "make clean" for all the projects
make clean-all will run "make clean" for all the projects and libraries
make lib will run "make all" for the library files
2015-04-17 17:22:38 +03:00
780455d68c
Makefile: Updated makefiles. Added makefiles for altera
2015-04-09 17:57:06 +03:00
5f8e9a74ea
makefile: updated
2015-04-07 16:32:01 -04:00
f79a152958
Makefiles: updated all makefiles adding clean functionality
2015-04-03 11:57:54 +03:00
243a9bc992
fmcomms1: AC701 update project to new framework
2015-04-02 15:30:02 +03:00
48e8945ac1
makefile: added
2015-04-01 16:29:29 -04:00
1c1464876c
makefile: added
2015-04-01 16:29:28 -04:00
56615a19f2
makefile: added
2015-04-01 16:29:27 -04:00
1a14a36db6
makefile: added
2015-04-01 16:29:26 -04:00
c085fbdd35
makefile: added
2015-04-01 16:29:24 -04:00
077d2699fe
makefile: added
2015-04-01 16:29:23 -04:00
d50bf705ef
makefile: added
2015-04-01 16:29:22 -04:00
7aeeaec5f4
fmcomms1: VC707 updated to the latest framework
2015-03-30 18:09:57 +03:00
89b83f8a00
fmcomms1: KC705 project updated to the latest framework
2015-03-30 18:09:17 +03:00
01f8c373b0
fmcomms1: Updated zc702 project to the latest framework
2015-03-27 15:38:46 +02:00
dbcf8389b3
fmcomms1: Updated zed project to the latest framework
2015-03-27 15:37:50 +02:00
10f3ac4d22
fmcomms1: Updated common and ZC706 project to the latest flow
2015-03-25 17:41:14 +02:00
abde4048e0
fmcomms1: Add extra AXI slice on ADC DMA path
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Add a extra AXI slice on the ADC DMA data path to the HP interconnect to
improve the timing.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-02-20 16:43:45 +01:00
47871287f3
kc705: Updated base project with linear flash. Updated all depending projects
2015-01-13 10:19:07 +02:00
2e72a2cc0c
fmcomms1: Updated VC707 project with latest interrupts and linear flash. Fixed constraints and constraint priority
2014-11-25 15:00:00 +02:00
dbc9da8598
fmcomms1: Updated KC705 project with latest interrupts. Fixed constraints and constraint priority
2014-11-25 14:56:22 +02:00
87324d8a14
fmcomms1: Updated AC701 project with latest interrupts. Fixed constraints and constraint priority
2014-11-25 14:54:01 +02:00
b8ab2ff847
fmcomms1: updated common project
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- increased the DMA FIFOs to 64
- added axi slices to the source and destination for DMAs
- for microblaze systems, increade the ad9643 dma data width at destination
- removed sys_fmc_dma_clk and used the sys_200m_clk instead for DMA data transfer
2014-11-25 14:51:42 +02:00
01b3495a81
fmcomms1: Updated ZC706 project to be compatible with util_wfifo and increased system_constr.xdc priority
2014-11-17 18:33:21 +02:00
20a3f322e7
fmcomms1: Updated zc702 project
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- fixed timing constraints, increased system_constr.xdc priority
- used ad_iobuf
- updated interrupt system to latest implementation
2014-11-17 18:32:12 +02:00
adcd16d033
fmcomms1: Updated zed project
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- fixed timing constraints
- used ad_iobuf
- updated interrupt system to latest implementation
2014-11-17 18:31:24 +02:00
6f5a268909
fmcomms1: ZC706, updated project with latest constraints and interrupts
2014-10-31 17:59:56 +02:00
17675863e0
all_projects: Fix the interrupt connections to preserve IRQ layout
2014-10-22 11:48:08 +03:00
4d4a7981f2
fmcomms1: Connect DMA controller directly to the HP ports
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The AXI DMAC controller nativly supports AXI3, there is no need to insert a interconnect to do protocol conversion.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-10-15 18:46:07 +03:00
89964be59e
fmcomms1: Updated project to vivado 2014.2
2014-09-30 10:32:18 +03:00
3c25c1171d
fmcomms1: Fixed missing sample issue on ZC706. Added modifications for all other platforms
2014-09-26 10:28:07 -04:00
fe1eaefcff
fmcomms1: zc706
2014-08-22 09:08:55 -04:00
ba44ee63be
fmcomms1: modified the fmcomms1_bd.tcl to make it compatible with latest wfifo
2014-04-14 17:04:04 +03:00
d0f04fd788
fmcomms1: Commit AC701 and VC707 projects
2014-04-11 17:35:25 +03:00
dc7b3e085c
axi_dmac: Fix issues with non 64-bit AXI masters
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Make sure that the address generator behaves correctly when the buswidth is not
64-bit. Also since the source and destination can have different widths add
separate parameters for source and destination address alignment.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-04-10 14:54:22 +02:00
f0b8b8f6c0
FMCOMMS1: KC705 updated system_top and constraints
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Needed to be compatible with the latest common file
2014-03-31 17:49:10 +03:00
14b82c03dd
FMCOMMS1: Several modifications in the base design
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Corrected the ADC/DAC interrupt location for microblaze systems
Removed the ILA clock generation from sys_audio_clkgen and created a
separate clock generator
All system is reset from the same source
2014-03-31 17:44:57 +03:00
ad5ef35b48
fmcomms1: modified *_bd.tcl files formatting
2014-03-26 12:05:42 +02:00
8f7d4c9b26
FMCOMMS1: Fixed typo in common/fmcomms1_bd.tcl
2014-03-25 14:34:55 +02:00
2070c66b87
Fmcomms1: Initial commit for KC705
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Modified common project so it can be compatible for both ARM and
Microblaze based systems.
2014-03-24 16:52:24 +02:00
ab8627e669
fmcomms1: Changed ILA data capture and sys constraints
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The ILA can not work at 250MHz on ZED/ZC702. Because of this, the data
path was modified from 28bits@250MHz to 56bits@125MHz, by using a FIFO.
The ZED/ZC702 max BUFG frequency is 464MHz, which corresponds to a 2.16
period so the constraints were modified accordingly.
2014-03-17 15:50:01 +02:00
Adrian Costina
Rejeesh Kutty
Lars-Peter Clausen
Istvan Csomortani