PopPaul2021
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c71e5de928
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zcu102: ad_fmclidar1_ebz, fmcomms5, fmcomms8 (#811)
adrv2crr_fmc: adrv9009zu11eg
adrv2crr_xmicrowave: adrv9009zu11eg
The IBUFGDS primitive is deprecated in UltraScale devices.
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2021-11-22 08:09:46 +02:00 |
Adrian Costina
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591a23156b
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Makefiles: Update header with the appropriate license
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2021-09-16 16:50:53 +03:00 |
Sergiu Arpadi
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6f2f2b8626
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makefile: Regenerate make files
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2021-01-20 01:02:56 +02:00 |
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sergiu arpadi
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acbbd4636a
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sysid: Upgrade framework, header/ip are now at 2/1.1.a
Unify tcl scripts; rename adi_pd_intel.tcl to adi_pd.tcl
add git branch to internal use area; update log prints;
update xilixn projects; fix cn0506 sysid script;
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2021-01-20 01:02:56 +02:00 |
aholtzma
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2ff5420630
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Update system_top.v
Add a comment that the spi CS decoding is tied to a setting in the device tree.
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2020-11-02 16:59:08 +02:00 |
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Adrian Costina
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9093a8c428
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library: Move ad_iobuf to the common library, as it's not Xilinx specific
Updated all system_project and Makefiles
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2020-11-02 16:13:35 +02:00 |
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Sergiu Arpadi
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d8ab27b2af
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sysid: Remove cstring init string
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2020-09-30 19:12:24 +03:00 |
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Adrian Costina
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bde2d1d66d
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fmcomms8: zcu102: Leave the SPI constraint at 25 MHz
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2020-09-25 11:54:12 +03:00 |
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Adrian Costina
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f8c2eb12d4
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fmcomms8: zcu102: Remove the test pins, as they are not connected
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2020-09-25 11:54:12 +03:00 |
Istvan Csomortani
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32eeedb660
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makefile: Update makefiles
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2020-05-07 08:41:49 +01:00 |
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Adrian Costina
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19b7986486
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fmcomms8: Fix SPI timing
The maximum SPI rate set to 10MHz
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2020-03-16 13:26:20 +02:00 |
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Adrian Costina
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fad52175d1
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fmcomms8: Fix spi connection
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2020-03-06 16:07:02 +02:00 |
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Adrian Costina
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e51d9372cd
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fmcomms8: ZCU102: Added DAC FIFO
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2020-02-10 11:23:52 +02:00 |
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Adrian Costina
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016a1d540d
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fmcomms8: ZCU102: Initial commit
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2020-02-10 11:23:52 +02:00 |