Villyam
5ebd95004d
library/axi_clock_monitor: Removed ID offset check, regmap optimized.
...
Signed-off-by: Villyam <Vilmoscsaba.Jozsa@analog.com>
2024-03-28 09:34:21 +02:00
Iulia Moldovan
68461110aa
Replace link in license header from master to main
...
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2024-01-16 16:48:45 +02:00
Iulia Moldovan
c9a7d4d927
Add copyright and license to .tcl, .ttcl files
...
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-25 15:22:26 +03:00
Iulia Moldovan
28c06d505f
Add/edit copyright and license for .v, .sv files
...
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-11 15:17:41 +03:00
Iulia Moldovan
db94628cc6
library & projects: Update Makefiles
...
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-01-27 11:54:05 +02:00
Iacob_Liviu
482f0489a3
scripts: Merge adi_env.tcl into a single file
...
Move the new adi_env.tcl file from hdl/projects/scripts into hdl/scrips
2022-08-08 13:52:54 +03:00
Iulia Moldovan
0c0617d49e
libraries: Update modules according to guideline
...
* Added header license for the files that didn't have
* Modified parentheses
* Removed extra spaces at the end of lines
* Fixed parameters list to be each parameter on its line
* Deleted lines after endmodule and consecutive empty lines
* Fixed indentation
Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>
2022-06-28 18:06:56 +03:00
AndrDragomir
60be01f2eb
axi_clock_monitor: Fix various issues
...
- Replace .xdc file
- Remove parameter dependency for wire signals
- Fix typo
- Remove unnecessary comments
- Fix signal width
2022-04-05 12:23:33 +03:00
AndrDragomir
204dff3b73
library: Adding axi_clock_monitor ip core
2022-03-29 10:02:42 +03:00