c9a7d4d927
Add copyright and license to .tcl, .ttcl files
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Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-25 15:22:26 +03:00
482f0489a3
scripts: Merge adi_env.tcl into a single file
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Move the new adi_env.tcl file from hdl/projects/scripts into hdl/scrips
2022-08-08 13:52:54 +03:00
4a772265a9
Update Quartus Prime version from 19.3.0 to 20.1.0
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adi_project_intel.tcl: Change quartus version to 20.1.0.
library: Set qsys version so that IP instances won't require a specific version.
2021-03-08 11:29:33 +02:00
0f7a3b953a
scripts/adi_ip_intel: Rename the ad_alt_intf to ad_interface
2019-06-29 06:53:51 +03:00
5329458a62
library/scripts: Rename adi_ip_alt.tcl to adi_ip_intel.tcl
2019-06-29 06:53:51 +03:00
9273cde33f
util_adcfifo/util_dacfifo: bundle AXIS signals into bus for Intel
2019-05-16 13:27:19 +03:00
fa32ea8f1f
util_dacfifo: Fix the reset logic of the module
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Both the DMA and DAC side should be in reset at the positive edge of the
dma_xfer_req, so we can re-initialize the buffer.
2018-10-11 16:57:30 +03:00
bdd7e29bae
util_dacfifo: Integrate grey coder/decoder module
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The grey coder/decoder function was limited to 10 bits, and this
resulted an unwanted limitation of the FIFO size. Using this
module, the coder/decoder data width can be adjusted to the current
address width.
2017-10-05 12:25:50 +01:00
d7e87a60a9
Remove executable flag from non-executable files
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All of these files are source code and are not executable standalone.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-07-28 17:56:07 +02:00
c728299e71
altera- default to latest version
2017-05-12 13:25:17 -04:00
760228d676
util_dacfifo: Update the util_dacfifo
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Fix bypass and undate the general functionality. If bypass enabled
the FIFO will function as a normal CDC FIFO.
2017-03-03 18:43:36 +02:00
104e9dfcdc
adc/dac-fifo altera cores
2017-02-28 13:30:50 -05:00
Iulia Moldovan
Iacob_Liviu
stefan.raus
Istvan Csomortani
Laszlo Nagy
Lars-Peter Clausen
Rejeesh Kutty