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29 Commits (e8b583802a749d496f2bf0a1a9b09626bc3f53fa)

Author SHA1 Message Date
Iulia Moldovan c9a7d4d927 Add copyright and license to .tcl, .ttcl files 
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
 2023-07-25 15:22:26 +03:00
Iulia Moldovan 1cac2d82e1 Add copyright and license to .xdc files 
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
 2023-07-25 11:03:02 +03:00
PopPaul2021 0d44bfb4dd
axi_hdmi_tx update for: ZedBoard, ZC706, ZC702, de10nano, ADRV9361-Z7035 (#897) 2022-03-29 16:51:21 +03:00
sergiu arpadi fc04198b2b adrc9361_ccfmc: Fix SFP pin locations 2022-01-12 13:43:06 +02:00
Owen McAree 5d008c3eca Correct constraints file pin mapping 2021-05-25 16:27:58 +03:00
Sergiu Arpadi 570dae7df6 adrv9361: Added sysid to all projects 2019-11-20 10:43:54 +02:00
Adrian Costina de324526e3 adrv9361z7035: Rename *box project to *packrf 2019-10-29 16:07:08 +02:00
Istvan Csomortani f0f314f24b adrv9361z7035: Fix interrupt concatenation 
None functional change, main goal is to increase consistancy in our
code base.
 2019-10-17 15:09:48 +03:00
AndreiGrozav ce5aadb3e4 adrv9361z7035/common/ccbox_constr.xdc: Cosmetics only 2019-07-17 10:37:30 +03:00
AndreiGrozav 6f627c2105 adrv9361z7035/ccbox: Keep by default in powerdown the 12V PS 
Because of build hazards, the power supply can be randomly powered on,
when the pin is left in high impedance.
 2019-07-17 10:37:30 +03:00
Istvan Csomortani 70b7d69ff8 whitespace: Delete all trailing white spaces 2019-06-07 10:20:15 +03:00
Laszlo Nagy 8390bf0ac6 adrv9361z7035:ccfmc_constr.xdc: constrain all input clocks 2019-05-30 14:55:11 +03:00
Laszlo Nagy 4b13274c55 ad9361/all/system_constr.xdc: remove manual clock definition 
Having a clock assigned manually to the clk output pin of the axi_ad9361
let the Vivado timing engine to not ignore the clock insertion delay when
analyzing paths between clk_0 and the manually created clock that has
the same source (clk_0), resulting in timing failure.
 2019-04-12 10:48:50 +03:00
Matt Fornero 0a67746352 adrv9361: Use new pack/unpack infrastructure 
Use the new util_cpack2 and util_upack2 cores. They have lower utilization
that the old util_cpack and util_upack cores.

Signed-off-by: Matt Fornero <matt.fornero@mathworks.com>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2018-11-28 11:33:11 +02:00
AndreiGrozav 9c6da0ff45 zed, zc702, zc706, ccfmc: Send video trough axis interface 2018-09-27 11:45:28 +03:00
AndreiGrozav fa6f45a406 adrv936x, fmcomms2/5, usrpe31x: Fix warning on the dac path 
Fix warnining regarding SYNC_TRANSFER_START parameter which doesn't
apply when the axi_dmac is configured for the tx path.
 2018-08-20 14:29:57 +03:00
AndreiGrozav ec400e5865 adrv9361z7035/ccfmc: Replace VDMA with ADI DMAC 2018-08-20 14:28:01 +03:00
AndreiGrozav 74288cf9cb axi_hdmi_tx: Added INTERFACE parameter for selecting the interface type 
Update all carriers/projects bd for configurable video interface:
- common zc702, zc706, zed
- adrv9361z7035/ccfmc_lvds
- imageon
 2018-07-24 15:56:22 +03:00
Istvan Csomortani 748b4598fc adrv9361z7035:ccusb: Delete deprecated project 2018-04-13 18:22:15 +03:00
Istvan Csomortani 62c7ecbbff adrv9361z7035:ccpci: Delete deprecated project 2018-04-13 18:22:15 +03:00
AndreiGrozav 6f52ddb2c7 adrv936x: Fix Ethernet 
Explicitly select MIO 52 and 53 pins to be part of MDIO port.
MIO_52_PIN (MDIO 0 Clock, Output)
MIO_53_PIN (MDIO 0 Data, Input/Output)
After the tool version change, this pins where by default connected
as MIO GPIOs.
 2018-04-11 15:09:54 +03:00
Rejeesh Kutty dc0a71920c adrv9361/ccbox- sort gpio - accidental multiple drivers 2017-08-25 13:30:46 -04:00
Rejeesh Kutty fd8b524953 adrv9361-ccbox/ccfmc- adl5904/gpio updates 2017-08-25 11:23:56 -04:00
Rejeesh Kutty d0503536a8 adrv936x- bd.tcl in data flow format 2017-08-04 13:48:22 -04:00
Istvan Csomortani 7cdb11cc34 axi_ad9361: Update the PPS receiver module 
+ Add a HDL parameter for the PPS receiver module :
PPS_RECEIVER_ENABLE. By default the module is disabled.
  + Add the CMOS_OR_LVDS_N and PPS_RECEIVER_ENABLE into the CONFIG
register
  + Define a pps_status read only register, which will be asserted, if the free
running counter reach a certain fixed threshold. (2^28) The register can
be deasserted by an incomming PPS only.
 2017-08-02 16:38:23 +01:00
Istvan Csomortani be5f2ad80f adrv9361z7035: Connect the gps_pps signal to the receiver 2017-07-28 08:03:33 +01:00
Rejeesh Kutty 8c60a2a850 rfsom/ccbox- rtc int 2017-07-20 09:22:45 -04:00
Rejeesh Kutty becc3e8628 rfsom/ccbox- tsw updates 2017-07-18 13:51:37 -04:00
Istvan Csomortani 26822af7e1 adrv9361z7035: Rename pzsdr2 to adrv9361z7035 2017-05-25 17:17:54 +03:00