Commit Graph

8 Commits (ebfed4b24bc333d45d4e2e94b1fca602c6cbbf00)

Author SHA1 Message Date
Adrian Costina 8ebc8fe4e2 updated makefiles 2016-12-09 23:06:41 +02:00
Istvan Csomortani 8e25bc01b3 all: Change tab to double space
Occasional file parsing and restructuring become a pain, if tabs exists
in code. General rule of the repos is tab always a double space.
2016-10-01 18:13:42 +03:00
Adrian Costina d60bce654c Makefiles: Updated Makefiles so they run correctly with gnuwin32 tools 2016-08-05 15:16:04 +03:00
Istvan Csomortani 64633e519c Merge remote-tracking branch 'origin/dev_ad7616' into dev 2016-06-29 12:32:39 +03:00
Rejeesh Kutty c293c04634 hdl make updates 2016-06-01 13:53:09 -04:00
Istvan Csomortani 4e57170384 spi_engine: Update SPI Engine frame work
+ data width and number of SDI lines are configurable
+ axi_spi_engine module can have two different type of memory map interface (S_AXI or UP)
2015-12-14 15:57:54 +02:00
Istvan Csomortani a147acd791 spi_engine: Add support for multiple SDI lines.
By changing the parameter called SDI_DATA_WIDTH the spi framework can support multiple SDI lines.
The supported number of SDI lines are: 1, 2, 3 and 4.
2015-11-02 18:42:55 +02:00
Lars-Peter Clausen e6b58e8a20 Add SPI Engine framework
SPI Engine is a highly flexible and powerful SPI controller framework. It
consist out of multiple sub-modules which communicate over well defined
interfaces. This allows a high degree of flexibility and re-usability while
at the same time staying highly customizable and easily extensible.

Currently included are four components:
	* SPI Engine execution module: The excution module is responsible for
	  handling the low-level physical interface SPI logic.
	* SPI Engine AXI interface module: The AXI interface module allows
	  memory mapped acccess to a SPI bus control stream and can be used to
	  implement a software driver that controls the SPI bus.
	* SPI Engine offload module: The offload module allows to store a
	  predefined SPI Engine command and data stream which will be send out
	  when a external trigger signal is asserted.
	* SPI Engine interconnect module: The interconnect module allows to
	  combine multiple control streams into a single stream giving multiple
	  control modules access to a execution module.

For more information see: http://wiki.analog.com/resources/fpga/peripherals/spi_engine

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-21 17:21:35 +02:00