Commit Graph

17 Commits (ed6bdf66bdcf7d63ea8a0697b98d6c3fff84e17b)

Author SHA1 Message Date
Lars-Peter Clausen c372064302 Add .gitattributes file
Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-07-01 18:43:51 +02:00
Rejeesh Kutty 6d0a2bf64c axi_adcfifo: added 2015-04-07 16:21:39 -04:00
Rejeesh Kutty f0395b646c plddr3: ad_connect updates 2015-03-09 16:07:37 -04:00
Rejeesh Kutty 65d9f08763 zc706: mig 2014.4 2015-01-09 14:12:52 -05:00
Rejeesh Kutty 77fa96fa67 plddr3: sys-rst from board pushbutton 2014-12-15 12:58:54 -05:00
Istvan Csomortani 34ffa15b12 zynq_plddr3: Fix PLDDR3's Reset Generator
Reset generator's external reset signal was active low, but the GT reset is active high, and both the DDR controller and FIFO2S were in reset.
Therefore the external reset active state is changed to active high. This setup in general is made by the tool automatically, in order to do it correctly, need to
set this two property of the reset generator.
2014-12-04 15:39:17 +02:00
Rejeesh Kutty c6af2696b3 plddr3: internal buswidth/clock conversion 2014-11-12 14:43:48 -05:00
Rejeesh Kutty 5715c5b28f dmafifo: axi stream interface 2014-10-15 14:50:57 -04:00
Rejeesh Kutty 7c98a783c5 2014.2 updates 2014-09-23 12:32:33 -04:00
Istvan Csomortani db1c931736 ad9625_plddr: PL DDR3 fixes
- Modified the axi slave interface handler
  - Increased the rfifo_mem input depth to prevent overflow
2014-07-23 19:34:44 +03:00
Istvan Csomortani 2b6ce1e504 zc706_plddr3 : Fix axi_fifo2s_axi_mrst net 2014-07-21 15:10:36 +03:00
Rejeesh Kutty 2955b9db78 fifo2s: flush if no request, c5soc: 14.0 2014-07-15 16:25:33 -04:00
Rejeesh Kutty b434fe6dd5 fmcomms5: register map changes 2014-07-08 16:57:43 -04:00
Rejeesh Kutty e38813fa9f fifo- monitor status signals 2014-06-25 12:15:13 -04:00
Rejeesh Kutty 57bb3705f2 zc706-plddr3: read changes to lower dma clock 2014-06-25 09:20:58 -04:00
Rejeesh Kutty c789dce77e ad9625/zc706: added pl ddr3 fifo changes 2014-05-29 12:59:29 -04:00
Rejeesh Kutty f73819f4d4 zc706: pl ddr3 initial checkin 2014-05-13 16:19:53 -04:00