Commit Graph

12 Commits (ed6bdf66bdcf7d63ea8a0697b98d6c3fff84e17b)

Author SHA1 Message Date
Adrian Costina 816238bb6c fmcjesdadc:A5gt, decreased destination bus width for DMAs to 256. Increased DMA FIFO to 32
With lower buswidth, if all 4 channels are captured some samples are lost
With fifo size of 64, there are timing violations in the DMAC
With this configuration, 65536 samples could be captured from all 4 channels with no sample lost
Because of the DMAC destination bus is 256, the number of samples to be captured must be a multiple of 16, otherwise the system will freeze. This will be corrected in software
2015-07-24 15:31:19 +03:00
Adrian Costina 3ea60bca5d fmcjesdadc1: a5gt, design working with quartus 15.0
- added cpack to the design
- removed 166 MHz clock as it is not needed. DMA destination is 512 bits
- removed clock bridge between DMA and DDR
2015-07-23 18:11:53 +03:00
Lars-Peter Clausen c372064302 Add .gitattributes file
Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-07-01 18:43:51 +02:00
Adrian Costina 1c9b41db6f fmcjesdadc1: A5GT project, added modular sgdma for Ethernet, nios configured for linux 2015-05-08 14:51:24 +03:00
Rejeesh Kutty 3aac5f9494 fmcjesdadc1/a5gt: 14.1 updates 2015-04-03 14:54:55 -04:00
Adrian Costina 9672271155 fmcjestadc1: a5gt: Updated project to work with linux and fixed ethernet
- added phy reset mechanism for proper functioning of the ethernet
- not all DDR is accesible, as NIOS2 can't access it with MMU enabled
2015-01-23 13:30:56 +02:00
Lars-Peter Clausen 50faf0c53a Remove executable flags from non-exectuable files 2014-09-09 15:05:06 +02:00
Rejeesh Kutty cb29b83b05 a5gt: updates to match a5gt 2014-08-25 10:46:59 -04:00
Rejeesh Kutty 33979fc533 fixes to improve timing - fifo for clock domain transfers 2014-04-04 13:49:53 -04:00
Rejeesh Kutty 6a19b34a00 a5gt: added tightly coupled memory 2014-04-03 20:50:17 -04:00
Rejeesh Kutty 04df908fbf altera-fmcjesdadc1 initial checkin 2014-04-01 12:01:57 -04:00
Rejeesh Kutty 0d678b89ed altera a5gt fmcjesdadc1 setup 2014-04-01 11:46:37 -04:00