Commit Graph

9 Commits (f81532d1d792d9104e3d2290155c0155893e3d7f)

Author SHA1 Message Date
Iulia Moldovan 1cac2d82e1 Add copyright and license to .xdc files
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-25 11:03:02 +03:00
Rejeesh Kutty 4ef784b609 fmcomms2/zc702- pmod1 udc, pmod2 gpio 2017-08-09 14:08:47 -04:00
AndreiGrozav b0eff57b0f fmcomms2/zc702: Fix critical warnings 2016-12-08 19:54:52 +02:00
Istvan Csomortani c051a578e5 fmcomms2: Delete unnecessary clock definition
The two clocks, rx_clk and ad9361_clk, are the same.
2015-11-20 19:35:37 +02:00
Istvan Csomortani 28aea82952 fmcomms2_zc702: Add SPI and GPIO interface for FREQCVT 2015-07-22 10:16:04 +03:00
Istvan Csomortani 0102e3e02c fmcomms2_ALL: Preserve backward compatibility for ENABLE/TXNRX control
By default the ENABLE/TXNRX pins are controlled by GPIOs, if the TDD module is enabled, the TDD FSM will take over the control of these two pins.
2015-07-01 13:54:01 +03:00
Adrian Costina ad08c62b36 fmcomms2: Updated zc702 project. Updated interrupts. Updated constraints 2014-11-07 14:01:55 +02:00
Adrian Costina 7e40f99fe9 fmcomms2: Improved constraints for ac701 and zc702. Fixed common design so that ILA works correctly on microblaze based systems 2014-09-23 22:28:27 -04:00
ATofan 2c898bf3a2 Added ZC706, ZC702 and ZED FMCOMMS2 Vivado Project
ZC706 runs rx_clk at 250 MHz.
ZC702 and ZED run rx_clk at 200 MHz due to slower fabric.
The ZC702 and ZED projects need init_user in the boot procedure in order for the HP Ports to work correctly.
Both DDS and DMA mode work.
2014-03-18 15:27:42 +02:00