Commit Graph

35 Commits (f81532d1d792d9104e3d2290155c0155893e3d7f)

Author SHA1 Message Date
Iulia Moldovan c9a7d4d927 Add copyright and license to .tcl, .ttcl files
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-25 15:22:26 +03:00
Iulia Moldovan 1cac2d82e1 Add copyright and license to .xdc files
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-25 11:03:02 +03:00
Iulia Moldovan 27bb69b44c Add copyright and license to .sdc files
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-25 10:41:40 +03:00
Iulia Moldovan 28c06d505f Add/edit copyright and license for .v, .sv files
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-11 15:17:41 +03:00
LIacob106 830b5aecb6 projects: 9009: system_project.tcl: List configs as comments
Add a list with make commands with the proper parameters for each devicetree
availible at the moment.

Signed-off-by: LIacob106 <liviu.iacob@analog.com>
2023-05-12 14:17:05 +03:00
Iulia Moldovan db94628cc6 library & projects: Update Makefiles
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-01-27 11:54:05 +02:00
LIacob106 10a87f34d3 projects/fmcomms8: Interconnect m_axi port for rx_xcvr
Signed-off-by: LIacob106 <liviu.iacob@analog.com>
2023-01-26 15:35:12 +02:00
LIacob106 19249b51db projects/fmcomms8: JESD support for 2, 4 TX_L and RX/ORX_L
On zcu102 carrier.

Signed-off-by: LIacob106 <liviu.iacob@analog.com>
2023-01-10 13:06:23 +02:00
AndrDragomir 8b9175a80c projects: Fix intermitent timing violation on a10soc
adrv9009, dac_fmc_ebz, ad9081_fmca_ebz, fmcomms8:
Increased PLACEMENT_EFFORT_MULTIPLIER global parameter to 1.2 for increased quality of placement
2022-12-13 14:21:24 +02:00
Bogdan Luncan 72313df81f Updated the makefiles to build the projects in subdirectories based on the build parameters.
Running 'make' will build the default project directly in the project folder (like it did before)
Running 'make RX_LANE_RATE=15 TX_LANE_RATE=15' will build the project inside the 'RXRATE15_TXRATE15' subdirectory.
Running 'make CFG=cfg/test_config.txt" will use the variables found inside the configuration file and build the project inside the 'test_config' subdirectory.
Running 'make clean' will clean the default project only.
Running 'make CFG=cfg/test_config.txt clean' will clean the 'testconfig' build.
Running 'make clean-all' will delete all the built configurations and libraries.

Note that the 'JESD' and 'LANE' words from the parameter names are stripped.

Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
2022-11-14 09:38:42 +02:00
Liviu.Iacob 6a583a8ace projects/fmcomms8: Expose jesd params, add support for TX_JESD_L=4 2022-10-03 10:27:15 +03:00
AndrDragomir 72378a6d4a projects: Add fmc connection files for eval boards
Creating a new eval board fmc file:
  - docs: Open FMC_eval_board_template.xlsx
  - follow the instructions on the first sheet
2022-09-20 14:11:08 +03:00
Iacob_Liviu 482f0489a3 scripts: Merge adi_env.tcl into a single file
Move the new adi_env.tcl file from hdl/projects/scripts into hdl/scrips
2022-08-08 13:52:54 +03:00
Iulia Moldovan 961ebe0cc2 projects: Update .v files according to guideline
Deleted lines after endmodule and consecutive empty lines.
Modified parentheses, extra spaces.
Fixed indentation.
Fixed parameters list to be each parameter on its line.

Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>
2022-06-28 18:06:56 +03:00
PopPaul2021 c71e5de928
zcu102: ad_fmclidar1_ebz, fmcomms5, fmcomms8 (#811)
adrv2crr_fmc: adrv9009zu11eg
adrv2crr_xmicrowave: adrv9009zu11eg

The IBUFGDS primitive is deprecated in UltraScale devices.
2021-11-22 08:09:46 +02:00
Robin Getz 63b6711cfa start adding some doc to the ./projects directory
This adds a Readme.md to each project directory with pointers to project
documentation in the wiki, and the drivers (if they exist). This will
help with some autogenerated doc in the wiki, that is generated with the
innovatily named "wiki_summary.sh" shell script that parses through
these Readme.md files, and generates a summary table.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Iacob Liviu Mihai <liviu.iacob@analog.com>
2021-11-10 14:01:06 +02:00
Adrian Costina 591a23156b Makefiles: Update header with the appropriate license 2021-09-16 16:50:53 +03:00
Adrian Costina 6d504d14cf fmcomms8: zcu102: Fix lane swapping 2021-02-05 15:07:09 +02:00
Sergiu Arpadi 6f2f2b8626 makefile: Regenerate make files 2021-01-20 01:02:56 +02:00
sergiu arpadi acbbd4636a sysid: Upgrade framework, header/ip are now at 2/1.1.a
Unify tcl scripts; rename adi_pd_intel.tcl to adi_pd.tcl
add git branch to internal use area; update log prints;
update xilixn projects; fix cn0506 sysid script;
2021-01-20 01:02:56 +02:00
Istvan Csomortani dee108ba22 fmcomms8/intel: Fix fPLL configuration
When phase alignment is active, the PFD frequency value should be used
as outclk1 actual frequency.

The configuration interface of the fPLL does not support fractional values.
If the reference clock is fractional, the tool will throw an error that requirement
above is not respected.

Round up the reference clock for the SERDES and the lane rate in order to
overcome this issue, until it's not fixed by Intel.
2021-01-12 19:34:44 +02:00
aholtzma 2ff5420630 Update system_top.v
Add a comment that the spi CS decoding is tied to a setting in the device tree.
2020-11-02 16:59:08 +02:00
Adrian Costina 9093a8c428 library: Move ad_iobuf to the common library, as it's not Xilinx specific
Updated all system_project and Makefiles
2020-11-02 16:13:35 +02:00
Adrian Costina 0644edb389 fmcomms8: a10soc: Move RX and Observation to second SDRAM interface
This is an attempt to get full bandwidth without a FIFO
2020-10-26 18:12:14 +02:00
Adrian Costina 6621fbec61 fmcomms8: a10soc: Initial commit 2020-10-26 18:12:14 +02:00
Sergiu Arpadi d8ab27b2af sysid: Remove cstring init string 2020-09-30 19:12:24 +03:00
Adrian Costina bde2d1d66d fmcomms8: zcu102: Leave the SPI constraint at 25 MHz 2020-09-25 11:54:12 +03:00
Adrian Costina 4d2e05d5dd fmcomms8: common: In the SPI module, use ad_iobuf instead of a Xilinx primitive 2020-09-25 11:54:12 +03:00
Adrian Costina f8c2eb12d4 fmcomms8: zcu102: Remove the test pins, as they are not connected 2020-09-25 11:54:12 +03:00
Istvan Csomortani 32eeedb660 makefile: Update makefiles 2020-05-07 08:41:49 +01:00
Adrian Costina 19b7986486 fmcomms8: Fix SPI timing
The maximum SPI rate set to 10MHz
2020-03-16 13:26:20 +02:00
Adrian Costina fad52175d1 fmcomms8: Fix spi connection 2020-03-06 16:07:02 +02:00
Adrian Costina 50d904934a fmcomms8: Changed the interrupt addresses to be similar with adrv9009zu11eg project 2020-03-06 16:07:02 +02:00
Adrian Costina e51d9372cd fmcomms8: ZCU102: Added DAC FIFO 2020-02-10 11:23:52 +02:00
Adrian Costina 016a1d540d fmcomms8: ZCU102: Initial commit 2020-02-10 11:23:52 +02:00