Commit Graph

31 Commits (f970bf17860d8e1403851aa22f92d2b1a777a497)

Author SHA1 Message Date
Istvan Csomortani 46fa91d5be Makefile: Update Make files 2015-07-03 18:08:57 +03:00
Rejeesh Kutty a6cae6b477 iobuf: do is a system verilog keyword 2015-05-21 14:06:17 -04:00
Lars-Peter Clausen 6b9906b22b Refresh Makefiles
Re-generate the Makefiles after a small update to the generation script:
- Entries are sorted alphabetically
- Empty dependency lines are skipped

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-21 14:21:54 +02:00
Adrian Costina c19749361d Makefiles: Updated makefiles to have as a result the programming file instead of the project file.
Also fixed altera projects dependencies
2015-05-18 17:22:46 +03:00
Adrian Costina 949abcdc8f Makefile: Updated makefiles so that the project recipe does not depend on lib 2015-05-06 14:58:29 +03:00
Lars-Peter Clausen 4ed7c9aee9 fmcomms2_pr: zc706: Fix ddr and fixed_io signal names
The toplevel input/output signal names are lower case, but the signals
connected to the system_wrapper are upper case. Since verilog is case
sensitive this leaves the toplevel input/output signals unconnected. Fix
this by using lower case names everywhere.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-23 14:33:47 +02:00
Adrian Costina dc2b37bd0c Makefile: Added top level Makefile. Modified behavior of clean and clean-all
Clean ran for a project will clean only the project files.
Clean-all ran for a project will clean also the library files on which the project depends.
The clean commands will only remove specific files and directories.

The top Makefile allows several options(per suggestion from jameyhicks):
make fmcomms1.zed will run "make all" in projects/fmcomms1/zed/
make clean will run "make clean" for all the projects
make clean-all will run "make clean" for all the projects and libraries
make lib will run "make all" for the library files
2015-04-17 17:22:38 +03:00
Adrian Costina 780455d68c Makefile: Updated makefiles. Added makefiles for altera 2015-04-09 17:57:06 +03:00
Rejeesh Kutty 5f8e9a74ea makefile: updated 2015-04-07 16:32:01 -04:00
Adrian Costina f79a152958 Makefiles: updated all makefiles adding clean functionality 2015-04-03 11:57:54 +03:00
Istvan Csomortani 2937445cce fmcomms2_pr: Update project to the new frame work. 2015-04-02 16:06:08 +03:00
Rejeesh Kutty c99630cb49 makefile: added 2015-04-01 16:29:45 -04:00
Rejeesh Kutty a9fe02419e makefile: added 2015-04-01 16:29:44 -04:00
Rejeesh Kutty 15ad9c287f makefile: added 2015-04-01 16:29:43 -04:00
Istvan Csomortani fcbbfa0177 fmcomms2_pr ZC706: Update project to the new framework 2015-03-24 13:37:37 +02:00
Istvan Csomortani 83d79a6acf fmcomms2_pr: Update system_project script for mitx
Bist logic is using the pnmon module for PRBS checking.
2014-11-21 19:23:12 +02:00
Istvan Csomortani 6517a94929 fmcomms2_pr: Update interrupts and iobuf
No functional changes, update to the new interrupt path, and change the
iobuf instantiation in order to keep consistency.
2014-11-21 19:22:03 +02:00
Istvan Csomortani 65588f1b67 fmcomms2_pr: Cosmetic changes of mitx system top. 2014-11-21 19:20:30 +02:00
Istvan Csomortani c0f4d7e2b5 mitx045_common: Definition file patch
In 2014.2 tool version, the way how a definition file needs to be applied is different
The command "apply_bd_automation" should be used, instead setting property PCW_IMPORT_BOARD_PRESET
In non-project mode (PR design flow), after creating the static design the type of the board is set.

NOTE: the definition file for mitx must be installed accordingly in order to get this work
See link: http://zedboard.org/support/documentation/2056
2014-11-21 19:14:37 +02:00
Istvan Csomortani 766589637e prcfg_zc706: Update data width and project script 2014-11-18 10:05:53 +02:00
Istvan Csomortani 5c7e8eb926 prcfg_setup: Fix data width, delete invalid ILA configurations 2014-11-18 10:05:51 +02:00
Istvan Csomortani bd57c2246e prcfg: Increase the PR portion area in order to increase the DSP resource. 2014-11-18 10:05:49 +02:00
Istvan Csomortani 91ea11041d prcfg_mitx045: Upgrade of the project script.
- the design using the common PN monitor
 - the first implemented logic will be the qpsk, to get a better result
 - cosmetic changes
2014-10-31 12:18:00 +02:00
Istvan Csomortani e450e78f13 prcfg: Update design to Vivado 2014.2 2014-10-31 12:05:19 +02:00
Istvan Csomortani 860a7caa56 prcfg: dac and adc to dma interface width is 64 2014-10-31 12:04:34 +02:00
Istvan Csomortani ea194755e1 prcfg: Upgrade the QPSK logic
Regenerate the qpsk logic, with the new HDL coder, and modify the design to support the new files.
2014-10-31 11:59:29 +02:00
Istvan Csomortani 17122661d2 fmcomms2_pr: Fix file path on ZC706/system_bd.tcl 2014-09-01 18:49:55 +03:00
Istvan Csomortani 902d5b0da2 prcfg: Update fmcomms2_pr for ZC706 2014-08-05 17:55:31 +03:00
Istvan Csomortani 9dfbf4a9a6 prcfg: Update the prcfg logic to the new ad9361 interface 2014-08-05 17:54:37 +03:00
Istvan Csomortani 085512a738 fmcomms2_pr: Fix the source path for prcfg_setup 2014-07-10 17:54:41 +03:00
Istvan Csomortani 95701fbd0e fmcomms2_pr : PR initial check in 2014-07-10 10:41:48 +03:00