e8ff32d6df
ad6676evb: Parameterize JESD204 configuration values
...
Added the capability to set the JESD204 configuration values from a single
point in the code and to modify these default settings from the command
line for the Xilinx FPGAs in the project.
Signed-off-by: Dan Hotoleanu <dan.hotoleanu@analog.com>
2022-01-31 10:36:31 +02:00
9093a8c428
library: Move ad_iobuf to the common library, as it's not Xilinx specific
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Updated all system_project and Makefiles
2020-11-02 16:13:35 +02:00
a589753d92
project/scripts: Rename adi_project.tcl to adi_project_xilinx.tcl
2019-06-29 06:53:51 +03:00
43725429ac
adi_project: Rename the process adi_project_xilinx to adi_project
2019-06-29 06:53:51 +03:00
b7ca17f02b
scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects
2017-06-07 12:06:50 +03:00
67390c2a95
ad6676evb: Update projects with ad_sysref_gen
2016-12-19 10:52:25 +00:00
d6918de19e
ad6676: Update projects to xcvr frame work
2016-11-10 10:39:46 +02:00
df36902713
lib_refactoring: Fix path of the IO macros
2016-08-08 15:07:19 +03:00
be74db656c
ad6674evb, fmcadc2, fmcadc4, fmcadc5, fmcjesdadc1:
...
Update system_project.tcl scripts to correctly select the necessary
constraint files
2016-05-04 19:37:33 +03:00
9104b2cc60
ad6676evb, fmcadc2, fmcadc4, fmcadc5,...
...
ad6676evb, fmcadc2, fmcadc4, fmcadc5, fmcjesdadc1: Remove unused
set_proprieties
2016-05-04 19:13:25 +03:00
c4a7730c89
ad6676evb/vc707: 2014.4 updates
2015-03-30 14:59:09 -04:00
3211964c2e
ad6676evb: added
2014-11-10 13:41:01 -05:00
Dan Hotoleanu
Adrian Costina
Istvan Csomortani
AndreiGrozav
Rejeesh Kutty