####################################################################################
## Copyright (c) 2018 - 2023 Analog Devices, Inc.
### SPDX short identifier: BSD-1-Clause
## Auto-generated, do not modify!
####################################################################################

LIBRARY_NAME := axi_ad4858

GENERIC_DEPS += ../common/ad_datafmt.v
GENERIC_DEPS += ../common/ad_edge_detect.v
GENERIC_DEPS += ../common/ad_rst.v
GENERIC_DEPS += ../common/up_adc_channel.v
GENERIC_DEPS += ../common/up_adc_common.v
GENERIC_DEPS += ../common/up_axi.v
GENERIC_DEPS += ../common/up_clock_mon.v
GENERIC_DEPS += ../common/up_delay_cntrl.v
GENERIC_DEPS += ../common/up_xfer_cntrl.v
GENERIC_DEPS += ../common/up_xfer_status.v
GENERIC_DEPS += axi_ad4858.v
GENERIC_DEPS += axi_ad4858_channel.v
GENERIC_DEPS += axi_ad4858_cmos.v
GENERIC_DEPS += axi_ad4858_crc.v
GENERIC_DEPS += axi_ad4858_lvds.v

XILINX_DEPS += ../util_cdc/sync_bits.v
XILINX_DEPS += ../xilinx/common/ad_data_in.v
XILINX_DEPS += ../xilinx/common/ad_rst_constr.xdc
XILINX_DEPS += ../xilinx/common/ad_serdes_out.v
XILINX_DEPS += ../xilinx/common/up_clock_mon_constr.xdc
XILINX_DEPS += ../xilinx/common/up_xfer_cntrl_constr.xdc
XILINX_DEPS += ../xilinx/common/up_xfer_status_constr.xdc
XILINX_DEPS += axi_ad4858_constr.ttcl
XILINX_DEPS += axi_ad4858_ip.tcl

include ../scripts/library.mk