####################################################################################
## Copyright 2018(c) Analog Devices, Inc.
## Auto-generated, do not modify!
####################################################################################

PROJECT_NAME := daq2_a10soc

M_DEPS += ../common/daq2_spi.v
M_DEPS += ../common/daq2_qsys.tcl
M_DEPS += ../../common/a10soc/a10soc_system_qsys.tcl
M_DEPS += ../../common/a10soc/a10soc_system_assign.tcl
M_DEPS += ../../common/a10soc/a10soc_plddr4_dacfifo_qsys.tcl
M_DEPS += ../../common/a10soc/a10soc_plddr4_assign.tcl

LIB_DEPS += altera/adi_jesd204
LIB_DEPS += altera/avl_dacfifo
LIB_DEPS += axi_ad9144
LIB_DEPS += axi_ad9680
LIB_DEPS += axi_dmac
LIB_DEPS += util_adcfifo
LIB_DEPS += util_cpack
LIB_DEPS += util_upack

include ../../scripts/project-altera.mk