############################################################################### ## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved. ### SPDX short identifier: ADIBSD ############################################################################### # c5soc carrier defaults # clocks set_location_assignment PIN_AF14 -to sys_clk set_instance_assignment -name IO_STANDARD "1.5 V" -to sys_clk # vga set_location_assignment PIN_W20 -to vga_clk set_location_assignment PIN_AH3 -to vga_blank_n set_location_assignment PIN_AG2 -to vga_sync_n set_location_assignment PIN_AD12 -to vga_hsync set_location_assignment PIN_AC12 -to vga_vsync set_location_assignment PIN_AG5 -to vga_red[0] set_location_assignment PIN_AA12 -to vga_red[1] set_location_assignment PIN_AB12 -to vga_red[2] set_location_assignment PIN_AF6 -to vga_red[3] set_location_assignment PIN_AG6 -to vga_red[4] set_location_assignment PIN_AJ2 -to vga_red[5] set_location_assignment PIN_AH5 -to vga_red[6] set_location_assignment PIN_AJ1 -to vga_red[7] set_location_assignment PIN_Y21 -to vga_grn[0] set_location_assignment PIN_AA25 -to vga_grn[1] set_location_assignment PIN_AB26 -to vga_grn[2] set_location_assignment PIN_AB22 -to vga_grn[3] set_location_assignment PIN_AB23 -to vga_grn[4] set_location_assignment PIN_AA24 -to vga_grn[5] set_location_assignment PIN_AB25 -to vga_grn[6] set_location_assignment PIN_AE27 -to vga_grn[7] set_location_assignment PIN_AE28 -to vga_blu[0] set_location_assignment PIN_Y23 -to vga_blu[1] set_location_assignment PIN_Y24 -to vga_blu[2] set_location_assignment PIN_AG28 -to vga_blu[3] set_location_assignment PIN_AF28 -to vga_blu[4] set_location_assignment PIN_V23 -to vga_blu[5] set_location_assignment PIN_W24 -to vga_blu[6] set_location_assignment PIN_AF29 -to vga_blu[7] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_clk set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_blank_n set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_sync_n set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_hsync set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_vsync set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_red[0] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_red[1] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_red[2] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_red[3] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_red[4] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_red[5] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_red[6] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_red[7] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_grn[0] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_grn[1] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_grn[2] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_grn[3] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_grn[4] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_grn[5] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_grn[6] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_grn[7] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_blu[0] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_blu[1] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_blu[2] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_blu[3] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_blu[4] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_blu[5] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_blu[6] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to vga_blu[7] # led & switches set_location_assignment PIN_AD7 -to gpio_bd_o[3] set_location_assignment PIN_AE11 -to gpio_bd_o[2] set_location_assignment PIN_AD10 -to gpio_bd_o[1] set_location_assignment PIN_AF10 -to gpio_bd_o[0] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to gpio_bd_o[3] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to gpio_bd_o[2] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to gpio_bd_o[1] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to gpio_bd_o[0] set_location_assignment PIN_AD11 -to gpio_bd_i[0] set_location_assignment PIN_AD9 -to gpio_bd_i[1] set_location_assignment PIN_AE12 -to gpio_bd_i[2] set_location_assignment PIN_AE9 -to gpio_bd_i[3] set_location_assignment PIN_AC29 -to gpio_bd_i[4] set_location_assignment PIN_AC28 -to gpio_bd_i[5] set_location_assignment PIN_V25 -to gpio_bd_i[6] set_location_assignment PIN_W25 -to gpio_bd_i[7] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to gpio_bd_i[0] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to gpio_bd_i[1] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to gpio_bd_i[2] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to gpio_bd_i[3] set_instance_assignment -name IO_STANDARD "2.5 V" -to gpio_bd_i[4] set_instance_assignment -name IO_STANDARD "2.5 V" -to gpio_bd_i[5] set_instance_assignment -name IO_STANDARD "2.5 V" -to gpio_bd_i[6] set_instance_assignment -name IO_STANDARD "2.5 V" -to gpio_bd_i[7] # uart set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to uart0_rx set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to uart0_tx # spim1 (lcd) set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to spim1_ss0 set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to spim1_clk set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to spim1_mosi set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to spim1_miso # usb set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to usb1_clk set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to usb1_stp set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to usb1_dir set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to usb1_nxt set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to usb1_d[0] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to usb1_d[1] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to usb1_d[2] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to usb1_d[3] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to usb1_d[4] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to usb1_d[5] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to usb1_d[6] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to usb1_d[7] # sdio set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to sdio_clk set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to sdio_cmd set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to sdio_d[0] set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to sdio_d[1] set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to sdio_d[2] set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to sdio_d[3] # qspi set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to qspi_ss0 set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to qspi_clk set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to qspi_io[0] set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to qspi_io[1] set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to qspi_io[2] set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to qspi_io[3] # ethernet set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to eth1_tx_clk set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to eth1_tx_ctl set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to eth1_tx_d[0] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to eth1_tx_d[1] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to eth1_tx_d[2] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to eth1_tx_d[3] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to eth1_rx_clk set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to eth1_rx_ctl set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to eth1_rx_d[0] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to eth1_rx_d[1] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to eth1_rx_d[2] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to eth1_rx_d[3] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to eth1_mdc set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to eth1_mdio # ddr set_instance_assignment -name D5_DELAY 2 -to ddr3_ck_p set_instance_assignment -name D5_DELAY 2 -to ddr3_ck_n set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_a[0] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_a[1] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_a[2] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_a[3] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_a[4] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_a[5] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_a[6] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_a[7] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_a[8] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_a[9] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_a[10] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_a[11] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_a[12] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_a[13] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_a[14] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_ba[0] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_ba[1] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_ba[2] set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_cas_n set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_cke set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_cs_n set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_odt set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_ras_n set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_reset_n set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to ddr3_we_n set_instance_assignment -name GLOBAL_SIGNAL OFF -to i_system_bd|sys_hps|hps_io|border|hps_sdram_inst|p0|umemphy|uio_pads|dq_ddio[0].read_capture_clk_buffer set_instance_assignment -name GLOBAL_SIGNAL OFF -to i_system_bd|sys_hps|hps_io|border|hps_sdram_inst|p0|umemphy|uio_pads|dq_ddio[1].read_capture_clk_buffer set_instance_assignment -name GLOBAL_SIGNAL OFF -to i_system_bd|sys_hps|hps_io|border|hps_sdram_inst|p0|umemphy|uio_pads|dq_ddio[2].read_capture_clk_buffer set_instance_assignment -name GLOBAL_SIGNAL OFF -to i_system_bd|sys_hps|hps_io|border|hps_sdram_inst|p0|umemphy|uio_pads|dq_ddio[3].read_capture_clk_buffer set_instance_assignment -name GLOBAL_SIGNAL OFF -to i_system_bd|sys_hps|hps_io|border|hps_sdram_inst|p0|umemphy|uread_datapath|reset_n_fifo_wraddress[0] set_instance_assignment -name GLOBAL_SIGNAL OFF -to i_system_bd|sys_hps|hps_io|border|hps_sdram_inst|p0|umemphy|uread_datapath|reset_n_fifo_wraddress[1] set_instance_assignment -name GLOBAL_SIGNAL OFF -to i_system_bd|sys_hps|hps_io|border|hps_sdram_inst|p0|umemphy|uread_datapath|reset_n_fifo_wraddress[2] set_instance_assignment -name GLOBAL_SIGNAL OFF -to i_system_bd|sys_hps|hps_io|border|hps_sdram_inst|p0|umemphy|uread_datapath|reset_n_fifo_wraddress[3] set_instance_assignment -name GLOBAL_SIGNAL OFF -to i_system_bd|sys_hps|hps_io|border|hps_sdram_inst|p0|umemphy|uread_datapath|reset_n_fifo_write_side[0] set_instance_assignment -name GLOBAL_SIGNAL OFF -to i_system_bd|sys_hps|hps_io|border|hps_sdram_inst|p0|umemphy|uread_datapath|reset_n_fifo_write_side[1] set_instance_assignment -name GLOBAL_SIGNAL OFF -to i_system_bd|sys_hps|hps_io|border|hps_sdram_inst|p0|umemphy|uread_datapath|reset_n_fifo_write_side[2] set_instance_assignment -name GLOBAL_SIGNAL OFF -to i_system_bd|sys_hps|hps_io|border|hps_sdram_inst|p0|umemphy|uread_datapath|reset_n_fifo_write_side[3] set_instance_assignment -name GLOBAL_SIGNAL OFF -to i_system_bd|sys_hps|hps_io|border|hps_sdram_inst|p0|umemphy|ureset|phy_reset_mem_stable_n set_instance_assignment -name GLOBAL_SIGNAL OFF -to i_system_bd|sys_hps|hps_io|border|hps_sdram_inst|p0|umemphy|ureset|phy_reset_n set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[0] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[1] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[2] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[3] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[4] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[5] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[6] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[7] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[8] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[9] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[10] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[11] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[12] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[13] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[14] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[15] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[16] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[17] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[18] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[19] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[20] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[21] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[22] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[23] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[24] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[25] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[26] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[27] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[28] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[29] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[30] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dq[31] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dqs_p[0] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dqs_p[1] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dqs_p[2] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dqs_p[3] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dqs_n[0] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dqs_n[1] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dqs_n[2] set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to ddr3_dqs_n[3] set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to ddr3_ck_p set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to ddr3_ck_n set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to ddr3_dqs_p[0] set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to ddr3_dqs_p[1] set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to ddr3_dqs_p[2] set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to ddr3_dqs_p[3] set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to ddr3_dqs_n[0] set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to ddr3_dqs_n[1] set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to ddr3_dqs_n[2] set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to ddr3_dqs_n[3] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_a[0] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_a[1] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_a[2] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_a[3] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_a[4] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_a[5] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_a[6] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_a[7] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_a[8] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_a[9] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_a[10] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_a[11] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_a[12] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_a[13] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_a[14] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_ba[0] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_ba[1] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_ba[2] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_cas_n set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_cke set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_cs_n set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dm[0] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dm[1] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dm[2] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dm[3] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[0] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[1] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[2] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[3] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[4] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[5] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[6] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[7] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[8] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[9] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[10] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[11] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[12] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[13] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[14] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[15] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[16] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[17] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[18] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[19] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[20] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[21] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[22] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[23] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[24] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[25] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[26] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[27] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[28] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[29] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[30] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_dq[31] set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_odt set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_ras_n set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_reset_n set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_we_n set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to ddr3_rzq set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dm[0] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dm[1] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dm[2] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dm[3] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[0] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[1] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[2] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[3] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[4] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[5] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[6] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[7] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[8] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[9] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[10] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[11] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[12] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[13] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[14] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[15] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[16] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[17] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[18] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[19] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[20] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[21] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[22] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[23] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[24] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[25] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[26] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[27] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[28] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[29] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[30] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dq[31] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dqs_p[0] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dqs_p[1] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dqs_p[2] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dqs_p[3] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dqs_n[0] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dqs_n[1] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dqs_n[2] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to ddr3_dqs_n[3] set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITHOUT CALIBRATION" -to ddr3_ck_p set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITHOUT CALIBRATION" -to ddr3_ck_n set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_a[0] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_a[1] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_a[2] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_a[3] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_a[4] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_a[5] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_a[6] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_a[7] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_a[8] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_a[9] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_a[10] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_a[11] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_a[12] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_a[13] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_a[14] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_ba[0] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_ba[1] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_ba[2] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_cas_n set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_ck_p set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_ck_n set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_cke set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_cs_n set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dm[0] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dm[1] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dm[2] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dm[3] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[0] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[1] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[2] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[3] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[4] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[5] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[6] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[7] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[8] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[9] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[10] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[11] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[12] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[13] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[14] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[15] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[16] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[17] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[18] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[19] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[20] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[21] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[22] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[23] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[24] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[25] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[26] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[27] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[28] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[29] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[30] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dq[31] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dqs_p[0] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dqs_p[1] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dqs_p[2] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dqs_p[3] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dqs_n[0] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dqs_n[1] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dqs_n[2] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_dqs_n[3] set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_odt set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_ras_n set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_reset_n set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to ddr3_we_n set_instance_assignment -name ENABLE_BENEFICIAL_SKEW_OPTIMIZATION_FOR_NON_GLOBAL_CLOCKS ON -to i_system_bd|sys_hps|hps_io|border|hps_sdram_inst set_instance_assignment -name PLL_COMPENSATION_MODE DIRECT -to i_system_bd|sys_hps|hps_io|border|hps_sdram_inst|pll0|fbout # ddr3 pin locations (quartus critical warnings) set_location_assignment PIN_F26 -to ddr3_a[0] set_location_assignment PIN_G30 -to ddr3_a[1] set_location_assignment PIN_F28 -to ddr3_a[2] set_location_assignment PIN_F30 -to ddr3_a[3] set_location_assignment PIN_J25 -to ddr3_a[4] set_location_assignment PIN_J27 -to ddr3_a[5] set_location_assignment PIN_F29 -to ddr3_a[6] set_location_assignment PIN_E28 -to ddr3_a[7] set_location_assignment PIN_H27 -to ddr3_a[8] set_location_assignment PIN_G26 -to ddr3_a[9] set_location_assignment PIN_D29 -to ddr3_a[10] set_location_assignment PIN_C30 -to ddr3_a[11] set_location_assignment PIN_B30 -to ddr3_a[12] set_location_assignment PIN_C29 -to ddr3_a[13] set_location_assignment PIN_H25 -to ddr3_a[14] set_location_assignment PIN_E29 -to ddr3_ba[0] set_location_assignment PIN_J24 -to ddr3_ba[1] set_location_assignment PIN_J23 -to ddr3_ba[2] set_location_assignment PIN_E27 -to ddr3_cas_n set_location_assignment PIN_M23 -to ddr3_ck_p set_location_assignment PIN_L23 -to ddr3_ck_n set_location_assignment PIN_L29 -to ddr3_cke set_location_assignment PIN_H24 -to ddr3_cs_n set_location_assignment PIN_K28 -to ddr3_dm[0] set_location_assignment PIN_M28 -to ddr3_dm[1] set_location_assignment PIN_R28 -to ddr3_dm[2] set_location_assignment PIN_W30 -to ddr3_dm[3] set_location_assignment PIN_K23 -to ddr3_dq[0] set_location_assignment PIN_K22 -to ddr3_dq[1] set_location_assignment PIN_H30 -to ddr3_dq[2] set_location_assignment PIN_G28 -to ddr3_dq[3] set_location_assignment PIN_L25 -to ddr3_dq[4] set_location_assignment PIN_L24 -to ddr3_dq[5] set_location_assignment PIN_J30 -to ddr3_dq[6] set_location_assignment PIN_J29 -to ddr3_dq[7] set_location_assignment PIN_K26 -to ddr3_dq[8] set_location_assignment PIN_L26 -to ddr3_dq[9] set_location_assignment PIN_K29 -to ddr3_dq[10] set_location_assignment PIN_K27 -to ddr3_dq[11] set_location_assignment PIN_M26 -to ddr3_dq[12] set_location_assignment PIN_M27 -to ddr3_dq[13] set_location_assignment PIN_L28 -to ddr3_dq[14] set_location_assignment PIN_M30 -to ddr3_dq[15] set_location_assignment PIN_U26 -to ddr3_dq[16] set_location_assignment PIN_T26 -to ddr3_dq[17] set_location_assignment PIN_N29 -to ddr3_dq[18] set_location_assignment PIN_N28 -to ddr3_dq[19] set_location_assignment PIN_P26 -to ddr3_dq[20] set_location_assignment PIN_P27 -to ddr3_dq[21] set_location_assignment PIN_N27 -to ddr3_dq[22] set_location_assignment PIN_R29 -to ddr3_dq[23] set_location_assignment PIN_P24 -to ddr3_dq[24] set_location_assignment PIN_P25 -to ddr3_dq[25] set_location_assignment PIN_T29 -to ddr3_dq[26] set_location_assignment PIN_T28 -to ddr3_dq[27] set_location_assignment PIN_R27 -to ddr3_dq[28] set_location_assignment PIN_R26 -to ddr3_dq[29] set_location_assignment PIN_V30 -to ddr3_dq[30] set_location_assignment PIN_W29 -to ddr3_dq[31] set_location_assignment PIN_N18 -to ddr3_dqs_p[0] set_location_assignment PIN_M19 -to ddr3_dqs_n[0] set_location_assignment PIN_N25 -to ddr3_dqs_p[1] set_location_assignment PIN_N24 -to ddr3_dqs_n[1] set_location_assignment PIN_R19 -to ddr3_dqs_p[2] set_location_assignment PIN_R18 -to ddr3_dqs_n[2] set_location_assignment PIN_R22 -to ddr3_dqs_p[3] set_location_assignment PIN_R21 -to ddr3_dqs_n[3] set_location_assignment PIN_H28 -to ddr3_odt set_location_assignment PIN_D30 -to ddr3_ras_n set_location_assignment PIN_P30 -to ddr3_reset_n set_location_assignment PIN_C28 -to ddr3_we_n set_location_assignment PIN_D27 -to ddr3_rzq # globals set_global_assignment -name USE_DLL_FREQUENCY_FOR_DQS_DELAY_CHAIN ON set_global_assignment -name UNIPHY_SEQUENCER_DQS_CONFIG_ENABLE ON set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS" set_global_assignment -name ECO_REGENERATE_REPORT ON set_global_assignment -name SYNCHRONIZER_IDENTIFICATION AUTO set_global_assignment -name ENABLE_ADVANCED_IO_TIMING ON set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER ON set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS ON set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V" set_global_assignment -name TIMEQUEST_DO_REPORT_TIMING ON set_global_assignment -name TIMEQUEST_DO_CCPP_REMOVAL ON set_global_assignment -name TIMEQUEST_REPORT_SCRIPT $ad_hdl_dir/projects/scripts/adi_tquest.tcl set_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION OFF