// ***************************************************************************
// ***************************************************************************
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// 
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`timescale 1ns/100ps

module usdrx1_spi (

  spi_fout_csn,
  spi_afe_csn,
  spi_clk_csn,
  spi_clk,
  spi_mosi,
  spi_miso,

  spi_fout_sdio,
  spi_afe_sdio,
  spi_clk_sdio);

  // 4 wire

  input   [ 5:0]  spi_fout_csn;
  input   [ 3:0]  spi_afe_csn;
  input           spi_clk_csn;
  input           spi_clk;
  input           spi_mosi;
  output          spi_miso;

  // 3 wire

  inout           spi_fout_sdio;
  inout           spi_afe_sdio;
  input           spi_clk_sdio;

  // internal registers

  reg     [ 5:0]  spi_count = 'd0;
  reg             spi_rd_wr_n = 'd0;
  reg             spi_enable = 'd0;

  // internal signals

  wire    [ 2:0]  spi_csn_3_s;
  wire            spi_csn_s;
  wire            spi_enable_s;
  wire            spi_fout_miso_s;
  wire            spi_afe_miso_s;
  wire            spi_clk_miso_s;

  // check on rising edge and change on falling edge

  assign spi_csn_3_s[2] = & spi_fout_csn;
  assign spi_csn_3_s[1] = & spi_afe_csn;
  assign spi_csn_3_s[0] = spi_clk_csn;
  assign spi_csn_s = & spi_csn_3_s;
  assign spi_enable_s = spi_enable & ~spi_csn_s;

  always @(posedge spi_clk or posedge spi_csn_s) begin
    if (spi_csn_s == 1'b1) begin
      spi_count <= 6'd0;
      spi_rd_wr_n <= 1'd0;
    end else begin
      spi_count <= spi_count + 1'b1;
      if (spi_count == 6'd0) begin
        spi_rd_wr_n <= spi_mosi;
      end
    end
  end

  always @(negedge spi_clk or posedge spi_csn_s) begin
    if (spi_csn_s == 1'b1) begin
      spi_enable <= 1'b0;
    end else begin
      if (((spi_count == 6'd16)  && (spi_csn_3_s[1] == 1'b0)) ||
          ((spi_count == 6'd16) && (spi_csn_3_s[0] == 1'b0))) begin
        spi_enable <= spi_rd_wr_n;
      end
    end
  end

  assign spi_miso =  ((spi_fout_miso_s & ~spi_csn_3_s[2]) |
                      (spi_afe_miso_s  & ~spi_csn_3_s[1]) |
                      (spi_clk_miso_s  & ~spi_csn_3_s[0]));

  // io buffers

  IOBUF i_iobuf_fout_sdio (
    .T (spi_enable_s),
    .I (spi_mosi),
    .O (spi_fout_miso_s),
    .IO (spi_fout_sdio));

  IOBUF i_iobuf_afe_sdio (
    .T (spi_enable_s),
    .I (spi_mosi),
    .O (spi_afe_miso_s),
    .IO (spi_afe_sdio));

  IOBUF i_iobuf_clk_sdio (
    .T (spi_enable_s),
    .I (spi_mosi),
    .O (spi_clk_miso_s),
    .IO (spi_clk_sdio));

endmodule

// ***************************************************************************
// ***************************************************************************