// ***************************************************************************
// ***************************************************************************
// Copyright 2011(c) Analog Devices, Inc.
//
// All rights reserved.
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// are permitted provided that the following conditions are met:
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//       of one or more patent holders.  This license does not release you
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// ***************************************************************************
// ***************************************************************************

`timescale 1ns/100ps

module fmcadc2_spi (

  spi_clk,

  spi_adc_csn,
  spi_ext_csn_0,
  spi_ext_csn_1,

  spi_mosi,
  spi_miso,

  spi_adc_sdio,
  spi_ext_sdio);

  // 4 wire

  input           spi_clk;

  input           spi_adc_csn;
  input           spi_ext_csn_0;
  input           spi_ext_csn_1;

  input           spi_mosi;
  output          spi_miso;

  // 3 wire

  inout           spi_adc_sdio;
  inout           spi_ext_sdio;

  // internal registers

  reg     [ 5:0]  spi_count = 'd0;
  reg             spi_rd_wr_n = 'd0;
  reg             spi_enable = 'd0;

  // internal signals

  wire            spi_csn_s;
  wire            spi_enable_s;
  wire            spi_adc_miso_s;
  wire            spi_ext_miso_s;

  // check on rising edge and change on falling edge

  assign spi_csn_s = spi_adc_csn & spi_ext_csn_0 & spi_ext_csn_1;
  assign spi_enable_s = spi_enable & ~spi_csn_s;

  always @(posedge spi_clk or posedge spi_csn_s) begin
    if (spi_csn_s == 1'b1) begin
      spi_count <= 6'd0;
      spi_rd_wr_n <= 1'd0;
    end else begin
      spi_count <= (spi_count < 6'h3f) ? spi_count + 1'b1 : spi_count;
      if (spi_count == 6'd0) begin
        spi_rd_wr_n <= spi_mosi;
      end
    end
  end

  always @(negedge spi_clk or posedge spi_csn_s) begin
    if (spi_csn_s == 1'b1) begin
      spi_enable <= 1'b0;
    end else begin
      if (spi_count == 6'd16) begin
        spi_enable <= spi_rd_wr_n;
      end
    end
  end

  assign spi_miso = ((spi_adc_miso_s & ~spi_adc_csn) |
                     (spi_ext_miso_s & ~spi_ext_csn_0) |
                     (spi_ext_miso_s & ~spi_ext_csn_1));

  // io butter

  IOBUF i_iobuf_adc_sdio (
    .T (spi_enable_s),
    .I (spi_mosi),
    .O (spi_adc_miso_s),
    .IO (spi_adc_sdio));

  IOBUF i_iobuf_clk_sdio (
    .T (spi_enable_s),
    .I (spi_mosi),
    .O (spi_ext_miso_s),
    .IO (spi_ext_sdio));

endmodule

// ***************************************************************************
// ***************************************************************************