####################################################################################
## Copyright (c) 2018 - 2023 Analog Devices, Inc.
### SPDX short identifier: BSD-1-Clause
## Auto-generated, do not modify!
####################################################################################

LIBRARY_NAME := jesd204_rx

GENERIC_DEPS += ../../common/ad_pack.v
GENERIC_DEPS += ../../common/ad_upack.v
GENERIC_DEPS += align_mux.v
GENERIC_DEPS += elastic_buffer.v
GENERIC_DEPS += jesd204_ilas_monitor.v
GENERIC_DEPS += jesd204_lane_latency_monitor.v
GENERIC_DEPS += jesd204_rx.v
GENERIC_DEPS += jesd204_rx_cgs.v
GENERIC_DEPS += jesd204_rx_ctrl.v
GENERIC_DEPS += jesd204_rx_frame_align.v
GENERIC_DEPS += jesd204_rx_lane.v

XILINX_DEPS += bd/bd.tcl
XILINX_DEPS += error_monitor.v
XILINX_DEPS += jesd204_rx_constr.ttcl
XILINX_DEPS += jesd204_rx_ctrl_64b.v
XILINX_DEPS += jesd204_rx_header.v
XILINX_DEPS += jesd204_rx_ip.tcl
XILINX_DEPS += jesd204_rx_lane_64b.v
XILINX_DEPS += jesd204_rx_ooc.ttcl

XILINX_DEPS += ../../jesd204/interfaces/jesd204_rx_cfg.xml
XILINX_DEPS += ../../jesd204/interfaces/jesd204_rx_cfg_rtl.xml
XILINX_DEPS += ../../jesd204/interfaces/jesd204_rx_event.xml
XILINX_DEPS += ../../jesd204/interfaces/jesd204_rx_event_rtl.xml
XILINX_DEPS += ../../jesd204/interfaces/jesd204_rx_ilas_config.xml
XILINX_DEPS += ../../jesd204/interfaces/jesd204_rx_ilas_config_rtl.xml
XILINX_DEPS += ../../jesd204/interfaces/jesd204_rx_status.xml
XILINX_DEPS += ../../jesd204/interfaces/jesd204_rx_status_rtl.xml

XILINX_LIB_DEPS += jesd204/jesd204_common
XILINX_LIB_DEPS += util_cdc

XILINX_INTERFACE_DEPS += jesd204/interfaces

INTEL_DEPS += ../../util_cdc/sync_bits.v
INTEL_DEPS += ../../util_cdc/sync_data.v
INTEL_DEPS += ../../util_cdc/sync_event.v
INTEL_DEPS += ../jesd204_common/jesd204_eof_generator.v
INTEL_DEPS += ../jesd204_common/jesd204_frame_align_replace.v
INTEL_DEPS += ../jesd204_common/jesd204_frame_mark.v
INTEL_DEPS += ../jesd204_common/jesd204_lmfc.v
INTEL_DEPS += ../jesd204_common/jesd204_scrambler.v
INTEL_DEPS += ../jesd204_common/pipeline_stage.v
INTEL_DEPS += jesd204_rx_constr.sdc
INTEL_DEPS += jesd204_rx_hw.tcl

include ../../scripts/library.mk