79 lines
3.0 KiB
ReStructuredText
79 lines
3.0 KiB
ReStructuredText
.. _spi_engine offload-control-interface:
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SPI Engine Offload Control Interface
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================================================================================
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The SPI-Engine offload control interface is used to configure and control a
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:ref:`spi_engine offload`.
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It is used to activate/deactivate the core as well re-program the command and
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SDO data RAM.
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Files
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--------------------------------------------------------------------------------
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.. list-table::
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:header-rows: 1
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* - Name
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- Description
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* - :git-hdl:`library/spi_engine/interfaces/spi_engine_offload_ctrl_rtl.xml`
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- Interface definition file
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Signal Pins
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--------------------------------------------------------------------------------
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.. list-table::
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:widths: 10 10 70
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:header-rows: 1
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* - Name
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- Direction (Manager)
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- Description
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* - ``cmd_wr_en``
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- Output
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- If asserted cmd_wr_data is written to the command memory.
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* - ``cmd_wr_data``
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- Output
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- Data to write to the command memory.
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* - ``sdo_wr_en``
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- Output
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- If asserted sdo_wr_data is written to the SDO data memory.
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* - ``sdo_wr_data``
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- Output
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- Data to write to the SDO data memory.
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* - ``mem_reset``
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- Output
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- Reset the contents of both the command and SDO data memory.
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* - ``enable``
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- Output
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- If asserted the connected offload core will get enabled.
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* - ``enabled``
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- Input
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- If asserted the connected offload core is enabled.
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Theory of Operation
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--------------------------------------------------------------------------------
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The SPI-Engine offload core typically implements to RAMs, one for the command
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stream and one for the SDO data stream. If the ``mem_reset`` signal is asserted
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the content of both memories is cleared. Asserting ``cmd_wr_en`` will write the
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value of ``cmd_wr_data`` to the command memory and increase the write address by
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one. The next time ``cmd_wr_en`` is asserted the next entry in the memory will
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be written and so on. If ``cmd_wr_en`` is asserted more times than the size of
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the command memory (without a reset in between) undefined behavior will occur.
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``sdo_wr_en`` and ``sdo_wr_data`` behave analogously for the SDO data memory.
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If the ``enable`` signal the is asserted the SPI-Engine offload core will be
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active, this means it will listen to external trigger events and execute the
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stored SPI transfer when the external trigger is asserted. If ``enable`` is not
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asserted the core will no longer listen to trigger events and will not start new
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transfers. But it might still be busy executing a SPI transfer that was started
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previously. The ``enabled`` signal is used to indicate this and it will stay
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asserted even after ``enable`` as been deasserted until the currently active SPI
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transfer has been completed.
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If either ``enable`` or ``enabled`` is asserted ``cmd_wr_en``, ``sdo_wr_en``, or
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``memt_reset`` must not be asserted, otherwise undefined behavior can occur. In
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other words as long as the SPI-Engine offload core is active the content of both
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the command and SDO data memory must remain stable and be consistent.
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