32 lines
1.0 KiB
Makefile
32 lines
1.0 KiB
Makefile
####################################################################################
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## Copyright (c) 2018 - 2023 Analog Devices, Inc.
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### SPDX short identifier: BSD-1-Clause
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## Auto-generated, do not modify!
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####################################################################################
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PROJECT_NAME := adrv9364z7020_ccpackrf_lvds
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M_DEPS += ../common/ccpackrf_constr.xdc
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M_DEPS += ../common/ccpackrf_bd.tcl
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M_DEPS += ../common/adrv9364z7020_constr_lvds.xdc
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M_DEPS += ../common/adrv9364z7020_constr.xdc
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M_DEPS += ../common/adrv9364z7020_bd.tcl
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M_DEPS += ../../scripts/adi_pd.tcl
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M_DEPS += ../../../library/common/ad_iobuf.v
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M_DEPS += ../../../library/common/ad_adl5904_rst.v
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M_DEPS += ../../../library/axi_ad9361/axi_ad9361_delay.tcl
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LIB_DEPS += axi_ad9361
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LIB_DEPS += axi_dmac
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LIB_DEPS += axi_i2s_adi
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LIB_DEPS += axi_sysid
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LIB_DEPS += sysid_rom
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LIB_DEPS += util_pack/util_cpack2
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LIB_DEPS += util_pack/util_upack2
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LIB_DEPS += util_rfifo
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LIB_DEPS += util_tdd_sync
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LIB_DEPS += util_wfifo
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LIB_DEPS += xilinx/util_clkdiv
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include ../../scripts/project-xilinx.mk
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