Istvan Csomortani ac2e5a9dac constraints: Update constraints ... Xilinx recommends that all synchronizer flip-flops have their ASYNC_REG property set to true in order to preserve the synchronizer cells through any logic optimization during synthesis and implementation.		2017-02-24 13:43:32 +02:00
..
Makefile	updated makefiles	2016-12-09 23:06:41 +02:00
util_adcfifo.v	util_adcfifo: Put a limit on the read/write address from memory so there is no overflow	2015-11-04 13:31:50 +02:00
util_adcfifo_constr.sdc	library/adcfifo- constraints update	2016-04-20 15:57:25 -04:00
util_adcfifo_constr.xdc	constraints: Update constraints	2017-02-24 13:43:32 +02:00
util_adcfifo_hw.tcl	library- altera updates	2016-05-23 10:55:07 -04:00
util_adcfifo_ip.tcl	Add .gitattributes file	2015-06-26 11:07:10 +02:00