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Istvan Csomortani aa7b0bb4dd VC707 basesys: General fixes, actual status: working 
- Add an auxiliary cpu interconnect
	- Add an auxiliary interrupt concatenation module
	- Add new MIG file, current frequency of the DDR interface is 100
	  Mhz
	- Memory interconnect optimisation strategy is 'Maximize
	  Performance'
 		2014-03-24 13:07:48 +02:00
..
ac701 AC701 bases sys: Add an auxiliary cpu interconnect 2014-03-24 13:01:52 +02:00
kc705 KC705 base system: Make a few cosmetic changes 2014-03-24 12:55:37 +02:00
vc707 VC707 basesys: General fixes, actual status: working 2014-03-24 13:07:48 +02:00
zc702 projects/adv7511: zynq boards 2014-03-03 10:16:49 -05:00
zc706 projects/adv7511: zynq boards 2014-03-03 10:16:49 -05:00
zed projects/adv7511: zynq boards 2014-03-03 10:16:49 -05:00