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Lars-Peter Clausen 02b5ce82ad imageon_loopback: Invert transmit clock 
The ADV7511 samples on the rising edge. Update the data on the falling
edge, this gives us a larger margin and improved signal stability.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2015-07-03 15:07:17 +02:00
library axi_mc_current_monitor: updated ad7401 driver to send unsigned data 2015-07-02 14:23:19 +03:00
projects imageon_loopback: Invert transmit clock 2015-07-03 15:07:17 +02:00
.gitattributes Add .gitattributes file 2015-06-26 11:07:10 +02:00
.gitignore gitignore: add non-project stuff 2015-05-01 13:17:14 -04:00
LICENSE Update LICENSE 2014-03-11 15:06:52 -04:00
Makefile Makefile: Added top level Makefile. Modified behavior of clean and clean-all 2015-04-17 17:22:38 +03:00
README.md README: Update Vivado version number, 2014.4.1 is the new supported version 2015-03-03 09:48:13 +02:00

README.md

hdl

Analog Devices HDL libraries and projects

Tools version:

  • Vivado 2014.4.1
  • Quartus 14.0

First time users, it is highly recommended to go through our HDL user guide at the following url:

http://wiki.analog.com/resources/fpga/docs/hdl

For support please visit our FPGA Reference Designs Support Community on EngineerZone:

http://ez.analog.com/community/fpga