29 lines
672 B
Tcl
29 lines
672 B
Tcl
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# keep interface-mess out of the way - keeping it pretty is a waste of time
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proc ad_alt_intf {type name dir width {remap ""}} {
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if {(($type eq "clock") && ($dir eq "input"))} {
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add_interface if_${name} clock sink
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add_interface_port if_${name} ${name} clk ${dir} ${width}
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return
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}
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if {(($type eq "clock") && ($dir eq "output"))} {
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add_interface if_${name} clock source
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add_interface_port if_${name} ${name} clk ${dir} ${width}
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return
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}
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if {$remap eq ""} {
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set remap $name
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}
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if {$type eq "signal"} {
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add_interface if_${name} conduit end
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add_interface_port if_${name} ${name} ${remap} ${dir} ${width}
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return
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}
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}
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