zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
pluto_hdl_adi/projects/pzsdr2
History
Adrian Costina 46290193f3 pzsdr2: ccusb, renamed clk_out to clkout_in 2017-02-14 11:58:11 +02:00
..
ccbox_lvds pzsdr2: Added FIFOs for DAC and ADC paths so that they work at l_clk/2 or l_clk/4 2017-01-18 12:00:10 +02:00
ccbrk_cmos pzsdr2: Added FIFOs for DAC and ADC paths so that they work at l_clk/2 or l_clk/4 2017-01-18 12:00:10 +02:00
ccbrk_lvds pzsdr2: Added FIFOs for DAC and ADC paths so that they work at l_clk/2 or l_clk/4 2017-01-18 12:00:10 +02:00
ccfmc_lvds pzsdr2: Added FIFOs for DAC and ADC paths so that they work at l_clk/2 or l_clk/4 2017-01-18 12:00:10 +02:00
ccpci_lvds pzsdr2: Added FIFOs for DAC and ADC paths so that they work at l_clk/2 or l_clk/4 2017-01-18 12:00:10 +02:00
ccusb_lvds pzsdr2: ccusb, renamed clk_out to clkout_in 2017-02-14 11:58:11 +02:00
common pzsdr2: ccusb, connect unused clock pins to GND 2017-02-14 11:56:54 +02:00
Makefile
…
README.md
…

README.md

PicoZed SDR SOM (PZSDR2)

This folder contains the PZSDR2 SOM projects for each of the carrier boards.

Board Design Files

Directory/File Description
common/pzsdr2_bd.tcl pzsdr2 SOM module board design file.
common/ccbrk_bd.tcl carrier, break out board design file.
common/ccfmc_bd.tcl carrier, fmc board design file.
common/ccpci_bd.tcl carrier, pci-e board design file.
common/ccusb_bd.tcl carrier, usb board design file.

FMC & BRK carrier designs includes loopback daughtercards for connectivity testing.

Board Constraint Files

Directory/File Description
common/pzsdr2_constr.xdc pzsdr2 SOM base constraints file.
common/pzsdr2_constr_cmos.xdc pzsdr2 SOM CMOS mode constraints file.
common/pzsdr2_constr_lvds.xdc pzsdr2 SOM LVDS mode constraints file.
common/ccbrk_constr.xdc carrier, break out board constraints file.
common/ccfmc_constr.xdc carrier, fmc board constraints file.
common/ccpci_constr.xdc carrier, pci-e board constraints file.
common/ccusb_constr.xdc carrier, usb board constraints file.

FMC & BRK carrier designs includes loopback daughtercards for connectivity testing.

Building, Generating Bit Files

[pzsdr2] cd ccbrk_cmos

[pzsdr2/ccbrk_cmos] make

The make in each carrier directory builds the corresponding project. The above example builds PZSDR2-CCBRK hardware bit files in CMOS mode.

Documentation