4026eaa19b
The device clocks are AC coupled LVDS lines without external termination. For proper operation internal differential termination must be enabled, the DQS_BIAS will DC bias the AC coupled signal to VCCO/2 (1.8/2) 0.9V |
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.. | ||
Makefile | ||
system_bd.tcl | ||
system_constr.xdc | ||
system_project.tcl | ||
system_top.v | ||
timing_constr.xdc |