135 lines
4.3 KiB
ReStructuredText
135 lines
4.3 KiB
ReStructuredText
.. _axi_hdmi_rx:
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AXI HDMI RX
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===============================================================================
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.. hdl-component-diagram::
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The :git-hdl:`AXI HDMI RX <library/axi_hdmi_rx>` IP core can be used to interface
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the :adi:`ADV7611` device using an FPGA.
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Features
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-------------------------------------------------------------------------------
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* AXI based configuration
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* Supports multiple resolution (max 1080p)
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* Supports embedded sync video reception (16bit data)
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* YCbCr or RGB color space output
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* Supported on FMC-IMAGEON Xilinx Reference Design
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Files
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--------------------------------------------------------------------------------
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.. list-table::
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:header-rows: 1
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* - Name
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- Description
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* - :git-hdl:`library/axi_hdmi_rx/axi_hdmi_rx.v`
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- Verilog source for the peripheral.
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.. _axi_hdmi_rx block-diagram:
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Block Diagram
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--------------------------------------------------------------------------------
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.. image:: block_diagram.svg
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:alt: AXI HDMI RX block diagram
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:align: center
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Configuration Parameters
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-------------------------------------------------------------------------------
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.. hdl-parameters::
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* - ID
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- Core ID should be unique for each axi_hdmi_rx IP in the system.
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* - IO_INTERFACE
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- Type of the IO interface. 0 - Allow sampling of data on falling edge of
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the HDMI clock. others - always sample the input data on rising edge.
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Interfaces
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-------------------------------------------------------------------------------
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.. hdl-interfaces::
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* - hdmi_rx_clk
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- Pixel clock.
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* - hdmi_rx_data
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- HDMI data.
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* - s_axi
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- DMA AXIS interface (vdma).
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* - hdmi_clk
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- Output clock.
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* - hdmi_dma_sof
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- Start of frame.
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* - hdmi_dma_de
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- Data enable.
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* - hdmi_dma_data
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- HDMI DMA data.
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* - hdmi_dma_ovf
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- Data overflow signal.
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* - hdmi_dma_unf
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- Data underflow signal.
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Detailed description
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-------------------------------------------------------------------------------
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The top module (**axi_hdmi_rx**), instantiates:
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* axi_hdmi_rx_core module
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* the HDMI RX register map
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* the AXI handling interface
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In **axi_hdmi_rx_core** module the video information is manipulated by passing
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through several processing blocks (see :ref:`axi_hdmi_rx block-diagram`):
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* Embedded Sync module acquires the video information and splits it into video
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data and synchronization signals.
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* Chroma supersampling block, super samples the video information to obtain a
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24 bit video information, has no impact on the video quality.
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* CSC (Color Space Conversion) –converts the video information from YCbCr color
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space to RGB color space. If YCbCr is the desired output color space the CSC
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block can be bypassed by setting to 1 the value of CSC_BYPASS in ``CNTRL`` register.
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* Sync monitoring - monitors the recovered hsync and vsync against the programmed
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expected resolution. Asserts out of sync and resolutions mismatch indicators
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in the ``TPM_STATUS2`` register.
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Register Map
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-------------------------------------------------------------------------------
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.. hdl-regmap::
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:name: HDMI_RX
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Design considerations
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-------------------------------------------------------------------------------
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Additional IPs needed:
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* :ref:`axi_dmac`
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* :git-hdl:`library/axi_spdif_tx`
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The :ref:`axi_dmac` is used to get the video information from the core into memory.
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The audio path is separated from the video path, for audio
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:git-hdl:`axi_spdif_tx <library/axi_spdif_tx>` core is needed to receive the audio
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information from the ADV7611 device and transmit it to the memory.
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The whole system needs to be controlled by a processor (ARM or a softcore) that can
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program the registers.
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Software support
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-------------------------------------------------------------------------------
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The core can be controlled by no-Os or Linux
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* :dokuwiki:`FMC-IMAGEON Xilinx Reference Design <resources/fpga/xilinx/fmc/fmc-imageon>`
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* :git-linux:`ADV7604, ADV7611, ADV7612 Linux Driver <drivers/media/i2c/adv7604.c>`
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References
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-------------------------------------------------------------------------------
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* :git-hdl:`library/axi_hdmi_rx`
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* :git-hdl:`projects/imageon`
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* :dokuwiki:`FMC-IMAGEON Xilinx Reference Design <resources/fpga/xilinx/fmc/fmc-imageon>`
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* :dokuwiki:`Zynq & Altera SoC Quick Start Guide <resources/tools-software/linux-software/kuiper-linux>`
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