68461110aa
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com> |
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Makefile | ||
README.rst | ||
system_bd.tcl | ||
system_constr.tcl | ||
system_project.tcl | ||
system_top_cmos.v | ||
system_top_lvds.v |
README.rst
- Connect on FMC LPC - VADJ = 1.8V to 3.3V Make sure that all power supply source/voltage selection jumpers are properly placed according to your use case on both the eval board and zed. The default interface at build is CMOS. To explicitly select an interface: - make LVDS_CMOS_N=0 for CMOS interface - make LVDS_CMOS_N=1 for LVDS interface