caosjr bad1d03678 spi_engine: Fixup param ranges and CPHA info (#1239) ... Set validation ranges for DATA_WIDTH and NUM_OF_CS for the expected min/max values in the verilog source code. Also, fix swapped description for CPHA in the documentation. Signed-off-by: Carlos Oliveira <caosjr8@gmail.com>		2023-12-18 10:52:26 -03:00
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axi_spi_engine	Add copyright and license to .tcl, .ttcl files	2023-07-25 15:22:26 +03:00
interfaces	spi_engine_execution: Merge the SDI lines into one vector	2020-05-19 09:28:02 +03:00
scripts	Add copyright and license to .tcl, .ttcl files	2023-07-25 15:22:26 +03:00
spi_axis_reorder	Add copyright and license to .tcl, .ttcl files	2023-07-25 15:22:26 +03:00
spi_engine_execution	spi_engine: Fixup param ranges and CPHA info (#1239)	2023-12-18 10:52:26 -03:00
spi_engine_interconnect	Add copyright and license to .tcl, .ttcl files	2023-07-25 15:22:26 +03:00
spi_engine_offload	Add copyright and license to .tcl, .ttcl files	2023-07-25 15:22:26 +03:00