pluto_hdl_adi/projects/cn0540/common
Istvan Csomortani dae1de0405 cn0540/bd: Generate a 80MHz spi_clk
Generate a higher frequency of spi_clk using an axi_clkgen. (MMCM)

CAUTION: ad7768-1 is still violating the standard SPI timing,
reducing the timing window significantly for the last bit (or last high
bit).
2020-10-02 10:50:06 +03:00
..
cn0540_bd.tcl cn0540/bd: Generate a 80MHz spi_clk 2020-10-02 10:50:06 +03:00
cn0540_qsys.tcl cn0540: Add de10nano reference design 2020-09-15 18:14:23 +03:00