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144fcc2965
pluto_hdl_adi
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projects
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daq3
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a10gx
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Sergiu Arpadi
3241924d14
sysid_intel: Added sysid to intel projects
2020-09-11 15:46:06 +03:00
..
Makefile
all: Rename altera to intel
2019-06-29 06:53:51 +03:00
system_constr.sdc
a10gx: Delete input/output delay definitions
2020-08-11 10:14:18 +03:00
system_project.tcl
daq3: Delete redundant timing constraint
2020-08-11 10:14:18 +03:00
system_qsys.tcl
sysid_intel: Added sysid to intel projects
2020-09-11 15:46:06 +03:00
system_top.v
sysid_intel: Added sysid to intel projects
2020-09-11 15:46:06 +03:00