Istvan Csomortani e31cfe5639 util_adxcvr_xch: GTHE4 connect CPLL_FBDIV_45 attribute		2018-10-04 14:37:02 +03:00
..
Makefile	Move Altera IP core dependency tracking to library Makefiles	2018-04-11 15:09:54 +03:00
util_adxcvr.v	xilinx: util_adxcvr: Add support for lane polarity inversion	2018-05-02 09:37:23 +02:00
util_adxcvr_constr.xdc	constraints: Update constraints	2017-02-24 13:43:32 +02:00
util_adxcvr_ip.tcl	axi|util_adxcvr: Delete reset interface inference for PLL resets	2018-08-23 18:41:48 +03:00
util_adxcvr_xch.v	util_adxcvr_xch: GTHE4 connect CPLL_FBDIV_45 attribute	2018-10-04 14:37:02 +03:00
util_adxcvr_xcm.v	Revert "util_adxcvr: Update GTH4 parameter values to work with DAQ3 at 12.33Gbps lane rate"	2018-10-04 14:37:02 +03:00