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AndreiGrozav e736504e0f fmcjesdadc1, usdrx1: Using the same clock in rx_data path 2017-03-10 14:26:51 +02:00
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a5gt fmcjesdadc1_a5gt: rx_data pins are all associated to the same clock 2017-03-09 08:57:03 +02:00
a5soc fmcjesdadc1, usdrx1: Using the same clock in rx_data path 2017-03-10 14:26:51 +02:00
common fmcjesdadc1/a5gt- use xilinx setup 2-dma 2016-12-22 14:14:21 -05:00
kc705 constraints: Update constraints 2017-02-24 13:43:32 +02:00
vc707 constraints: Update constraints 2017-02-24 13:43:32 +02:00
zc706 constraints: Update constraints 2017-02-24 13:43:32 +02:00
Makefile Makefiles: Update makefiles to include the nerw axi_gpreg / util_mfifo libraries 2015-11-10 09:32:50 +02:00