36 lines
1.3 KiB
Tcl
36 lines
1.3 KiB
Tcl
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set adc_fifo_name axi_ad9625_fifo
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set adc_fifo_address_width 18
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set adc_data_width 512
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set adc_dma_data_width 64
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source $ad_hdl_dir/projects/common/vc707/vc707_system_bd.tcl
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source $ad_hdl_dir/projects/common/xilinx/adcfifo_bd.tcl
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source ../common/fmcadc5_bd.tcl
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# ila
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ad_ip_instance util_mfifo mfifo_adc
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ad_ip_parameter mfifo_adc CONFIG.NUM_OF_CHANNELS 1
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ad_ip_parameter mfifo_adc CONFIG.DIN_DATA_WIDTH 512
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ad_ip_parameter mfifo_adc CONFIG.ADDRESS_WIDTH 6
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ad_ip_instance ila ila_adc
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ad_ip_parameter ila_adc CONFIG.C_MONITOR_TYPE Native
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ad_ip_parameter ila_adc CONFIG.C_TRIGIN_EN false
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ad_ip_parameter ila_adc CONFIG.C_EN_STRG_QUAL 1
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ad_ip_parameter ila_adc CONFIG.C_NUM_OF_PROBES 2
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ad_ip_parameter ila_adc CONFIG.C_PROBE0_WIDTH 1
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ad_ip_parameter ila_adc CONFIG.C_PROBE1_WIDTH 16
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ad_connect util_fmcadc5_0_xcvr/rx_out_clk_0 mfifo_adc/din_clk
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ad_connect axi_ad9625_0_jesd_rstgen/peripheral_reset mfifo_adc/din_rst
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ad_connect util_ad9625_cpack/adc_valid mfifo_adc/din_valid
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ad_connect util_ad9625_cpack/adc_data mfifo_adc/din_data_0
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ad_connect axi_ad9625_0_jesd_rstgen/peripheral_reset mfifo_adc/dout_rst
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ad_connect util_fmcadc5_0_xcvr/rx_out_clk_0 mfifo_adc/dout_clk
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ad_connect util_fmcadc5_0_xcvr/rx_out_clk_0 ila_adc/clk
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ad_connect mfifo_adc/dout_valid ila_adc/probe0
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ad_connect mfifo_adc/dout_data_0 ila_adc/probe1
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