..
tb
generate_xml.sh: Replace < and > in error message
2021-11-03 15:22:45 +02:00
ad_3w_spi.v
ad_3w_spi: Add a 4-wire to 3-wire SPI converter
2019-08-28 16:13:12 +03:00
ad_addsub.v
license: Fix a spelling mistake
2018-04-11 15:09:54 +03:00
ad_adl5904_rst.v
license: Fix a spelling mistake
2018-04-11 15:09:54 +03:00
ad_axis_inf_rx.v
data_offload: Fix m_axis output stability issue
2021-08-06 11:55:24 +03:00
ad_b2g.v
license: Fix a spelling mistake
2018-04-11 15:09:54 +03:00
ad_bus_mux.v
Add generic fir filters processes for RF projects
2019-08-20 16:24:47 +03:00
ad_csc.v
ad_csc: Fix warning for axi_hdmi_tx
2020-09-11 10:23:53 +03:00
ad_csc_CrYCb2RGB.v
ad_csc_CrYCb2RGB: localparam can not be used in port definition
2019-10-16 15:18:29 +03:00
ad_csc_RGB2CrYCb.v
ad_csc_RGB2CrYCb: localparam can not be used in port definition
2019-10-16 15:18:29 +03:00
ad_datafmt.v
ad_datafmt: Add support for 8 bit data width
2019-03-20 15:51:28 +02:00
ad_dds.v
ad_dds: Fix DDS start samples
2022-01-31 14:07:11 +02:00
ad_dds_1.v
ad_dds: Add selectable phase width option.
2018-07-18 18:19:30 +03:00
ad_dds_2.v
ad_dds_2: Don't try to round if signal is not truncated
2018-08-28 10:08:22 +02:00
ad_dds_cordic_pipe.v
ad_dds: Separated phase width from data width
2018-07-18 18:19:30 +03:00
ad_dds_sine.v
license: Fix a spelling mistake
2018-04-11 15:09:54 +03:00
ad_dds_sine_cordic.v
ad_dds: Fix synthesis updates
2018-07-18 18:19:30 +03:00
ad_edge_detect.v
ad_edge_detect: Change port names
2020-10-28 11:31:50 +02:00
ad_g2b.v
license: Fix a spelling mistake
2018-04-11 15:09:54 +03:00
ad_iobuf.v
library: Move ad_iobuf to the common library, as it's not Xilinx specific
2020-11-02 16:13:35 +02:00
ad_iqcor.v
common/ad_iqcor: Fix for sample width smaller than 16
2020-04-24 16:38:54 +03:00
ad_mem.v
util_axis_fifo: instantiate block ram in async mode
2018-04-11 15:09:54 +03:00
ad_mem_asym.v
ad_mem_asym: Add option to control cascade layout
2021-09-15 12:27:49 +03:00
ad_mux.v
ad_mux: another fix cases where channel number is not power of mux size
2020-11-27 09:45:11 +02:00
ad_mux_core.v
common/ad_mux: Pipelined mux, rtl and TB
2020-11-27 09:45:11 +02:00
ad_pack.v
common/ad_pack: Generic packer core and testbench
2021-02-05 15:24:15 +02:00
ad_perfect_shuffle.v
library: Add perfect shuffle module
2018-10-15 15:34:31 +03:00
ad_pngen.v
ad_pngen: Generic PN generator
2020-08-24 17:49:12 +03:00
ad_pnmon.v
ad_pnmon: Fix zero checking when valid not constant
2021-01-26 15:22:41 +02:00
ad_pps_receiver.v
license: Fix a spelling mistake
2018-04-11 15:09:54 +03:00
ad_pps_receiver_constr.ttcl
whitespace: Delete all trailing white spaces
2019-06-07 10:20:15 +03:00
ad_rst.v
ad_rst: Synthesis attribute 'preserve' is redundant
2018-08-14 17:54:14 +03:00
ad_ss_422to444.v
common/ad_ss_422to444.v: Fix warning
2020-09-11 10:23:53 +03:00
ad_ss_444to422.v
ad_ss_444to422: localparam can not be used in port definition
2019-10-16 15:18:29 +03:00
ad_sysref_gen.v
ad_sysref_gen: Fix quartus warnings
2018-04-13 11:32:57 +02:00
ad_tdd_control.v
ad_tdd_control: Avoid single pulses if tx_only or rx_only
2021-01-20 13:00:01 +02:00
ad_upack.v
common/ad_upack: Generic unpacker core and testbench
2021-02-05 15:24:15 +02:00
ad_xcvr_rx_if.v
common/ad_xcvr_rx_if: make core more generic
2018-12-04 14:02:22 +02:00
axi_ctrlif.vhd
license: Fix a spelling mistake
2018-04-11 15:09:54 +03:00
axi_streaming_dma_rx_fifo.vhd
license: Fix a spelling mistake
2018-04-11 15:09:54 +03:00
axi_streaming_dma_tx_fifo.vhd
license: Fix a spelling mistake
2018-04-11 15:09:54 +03:00
dma_fifo.vhd
license: Fix a spelling mistake
2018-04-11 15:09:54 +03:00
pl330_dma_fifo.vhd
license: Fix a spelling mistake
2018-04-11 15:09:54 +03:00
up_adc_channel.v
license: Fix a spelling mistake
2018-04-11 15:09:54 +03:00
up_adc_common.v
library/common/up_adc_common.v: Remove tabs
2021-10-27 18:36:47 +03:00
up_axi.v
up_axi.v: fixed bus width definition
2019-08-06 13:45:54 +03:00
up_clkgen.v
dev info parameter update: Increase pcore version
2019-03-30 11:26:11 +02:00
up_clock_mon.v
license: Fix a spelling mistake
2018-04-11 15:09:54 +03:00
up_dac_channel.v
up_dac_channel: add register for dma data xbar
2020-11-27 09:45:11 +02:00
up_dac_common.v
ad_ip_jesd204_tpl_dac: Move external dac sync bit
2021-10-27 18:36:47 +03:00
up_delay_cntrl.v
up_delay_cntrl:ad_serdes_in: Make delay value width parametrizable
2020-08-07 08:31:19 +03:00
up_hdmi_rx.v
Add missing timescale annotations
2018-10-17 10:32:47 +03:00
up_hdmi_tx.v
axi_hdmi_tx: Update register initialization
2020-09-25 12:56:53 +03:00
up_pmod.v
ad_rst: Update all the modules, which instantiate the ad_rst
2018-08-06 21:24:41 +03:00
up_tdd_cntrl.v
up_tdd_cntrl: Add magic value "TDDC"
2021-06-14 16:50:59 +03:00
up_xfer_cntrl.v
common/up_xfer_cntrl: Fix transfer done timing
2022-02-07 19:14:01 +02:00
up_xfer_status.v
license: Fix a spelling mistake
2018-04-11 15:09:54 +03:00
util_axis_upscale.v
util_axis_upscale: Sign extension must be done separately for each channel
2019-06-28 11:18:29 +03:00
util_dec256sinc24b.v
util_dec256sinc24b: Fix the accumulator
2019-06-28 11:18:29 +03:00
util_delay.v
license: Fix a spelling mistake
2018-04-11 15:09:54 +03:00
util_pulse_gen.v
util_pulse_gen: Reload registers when counter is at one
2022-01-04 15:02:05 +02:00
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