pluto_hdl_adi/projects/common
Istvan Csomortani f9a67371c0 Zynq Base System: Reset is synchronized to lowest system clock
System reset (sys_100m_reset) is synchronized to lowest system
	clock (FCLK0), via a Processor System Reset module
2014-03-26 17:58:14 +02:00
..
ac701 AC701/VC707: Define common variables 2014-03-25 14:24:51 +02:00
kc705 KC705 base system: Make a few cosmetic changes 2014-03-24 12:55:37 +02:00
vc707 AC701/VC707: Define common variables 2014-03-25 14:24:51 +02:00
zc702 Zynq Base System: Reset is synchronized to lowest system clock 2014-03-26 17:58:14 +02:00
zc706 Zynq Base System: Reset is synchronized to lowest system clock 2014-03-26 17:58:14 +02:00
zed Zynq Base System: Reset is synchronized to lowest system clock 2014-03-26 17:58:14 +02:00