pluto_hdl_adi/projects/common/zc706
Istvan Csomortani f9a67371c0 Zynq Base System: Reset is synchronized to lowest system clock
System reset (sys_100m_reset) is synchronized to lowest system
	clock (FCLK0), via a Processor System Reset module
2014-03-26 17:58:14 +02:00
..
zc706_system_bd.tcl Zynq Base System: Reset is synchronized to lowest system clock 2014-03-26 17:58:14 +02:00
zc706_system_constr.xdc added common board files 2014-02-28 21:17:01 -05:00