64 lines
1.9 KiB
Tcl
64 lines
1.9 KiB
Tcl
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global adc_spi_freq
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# pmod interfaces
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create_bd_port -dir O pmod_spi_cs
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create_bd_port -dir I pmod_spi_miso
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create_bd_port -dir O pmod_spi_clk
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create_bd_port -dir O pmod_spi_convst
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create_bd_port -dir I pmod_gpio
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# instances
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ad_ip_instance util_pmod_adc pmod_spi_core
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ad_ip_parameter pmod_spi_core CONFIG.FPGA_CLOCK_MHZ 100
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ad_ip_instance axi_dmac pmod_spi_dma
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ad_ip_parameter pmod_spi_dma CONFIG.DMA_TYPE_SRC 2
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ad_ip_parameter pmod_spi_dma CONFIG.DMA_TYPE_DEST 0
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ad_ip_parameter pmod_spi_dma CONFIG.ID 0
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ad_ip_parameter pmod_spi_dma CONFIG.AXI_SLICE_SRC 0
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ad_ip_parameter pmod_spi_dma CONFIG.AXI_SLICE_DEST 0
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ad_ip_parameter pmod_spi_dma CONFIG.SYNC_TRANSFER_START 0
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ad_ip_parameter pmod_spi_dma CONFIG.DMA_LENGTH_WIDTH 24
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ad_ip_parameter pmod_spi_dma CONFIG.DMA_2D_TRANSFER 0
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ad_ip_parameter pmod_spi_dma CONFIG.CYCLIC 0
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ad_ip_parameter pmod_spi_dma CONFIG.DMA_DATA_WIDTH_SRC 16
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ad_ip_parameter pmod_spi_dma CONFIG.DMA_DATA_WIDTH_DEST 64
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ad_ip_instance util_pmod_fmeter pmod_gpio_core
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# additional configurations
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ad_ip_parameter sys_ps7 CONFIG.PCW_USE_S_AXI_HP1 1
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ad_connect sys_cpu_clk pmod_spi_dma/fifo_wr_clk
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ad_connect sys_cpu_clk pmod_spi_core/clk
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ad_connect sys_cpu_clk pmod_gpio_core/ref_clk
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ad_connect pmod_spi_core/resetn sys_rstgen/peripheral_aresetn
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ad_connect pmod_spi_core/adc_data pmod_spi_dma/fifo_wr_din
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ad_connect pmod_spi_core/adc_valid pmod_spi_dma/fifo_wr_en
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ad_connect pmod_spi_miso pmod_spi_core/adc_sdo
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ad_connect pmod_spi_clk pmod_spi_core/adc_sclk
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ad_connect pmod_spi_cs pmod_spi_core/adc_cs_n
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ad_connect pmod_spi_convst pmod_spi_core/adc_convst_n
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ad_connect pmod_gpio pmod_gpio_core/square_signal
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# interrupts
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ad_cpu_interrupt ps-13 mb-12 pmod_spi_dma/irq
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# cpu / memory interconnects
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ad_cpu_interconnect 0x43010000 pmod_spi_dma
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ad_cpu_interconnect 0x43C00000 pmod_gpio_core
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ad_mem_hp1_interconnect sys_cpu_clk sys_ps7/S_AXI_HP1
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ad_mem_hp1_interconnect sys_cpu_clk pmod_spi_dma/m_dest_axi
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