Iulia Moldovan db94628cc6 library & projects: Update Makefiles ... Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>		2023-01-27 11:54:05 +02:00
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bd	jesd204: Xilinx: NP=12 support	2021-02-05 15:24:15 +02:00
Makefile	library & projects: Update Makefiles	2023-01-27 11:54:05 +02:00
jesd204_tx.v	library/jesd204: Add support for a gearbox ratio in which the TPL width is smaller than the PHY interface	2022-08-25 12:35:42 +03:00
jesd204_tx_constr.sdc	jesd204: Intel: NP12 support	2021-02-05 15:24:15 +02:00
jesd204_tx_constr.ttcl	jesd204: Xilinx: NP=12 support	2021-02-05 15:24:15 +02:00
jesd204_tx_ctrl.v	libraries: Update modules according to guideline	2022-06-28 18:06:56 +03:00
jesd204_tx_gearbox.v	library/jesd204: Add support for a gearbox ratio in which the TPL width is smaller than the PHY interface	2022-08-25 12:35:42 +03:00
jesd204_tx_header.v	libraries: Update modules according to guideline	2022-06-28 18:06:56 +03:00
jesd204_tx_hw.tcl	library/jesd204: Add support for a gearbox ratio in which the TPL width is smaller than the PHY interface	2022-08-25 12:35:42 +03:00
jesd204_tx_ip.tcl	library/jesd204: Add support for a gearbox ratio in which the TPL width is smaller than the PHY interface	2022-08-25 12:35:42 +03:00
jesd204_tx_lane.v	libraries: Update modules according to guideline	2022-06-28 18:06:56 +03:00
jesd204_tx_lane_64b.v	libraries: Update modules according to guideline	2022-06-28 18:06:56 +03:00
jesd204_tx_ooc.ttcl	jesd204: Add out of context constraint file for link layer cores	2021-05-14 15:39:40 +03:00