Iulia Moldovan 28c06d505f Add/edit copyright and license for .v, .sv files ... Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>		2023-07-11 15:17:41 +03:00
..
Makefile	library & projects: Update Makefiles	2023-01-27 11:54:05 +02:00
system_bd.tcl	projects/common: Add build files templates carriers. Modified Quartus Versions	2022-10-05 10:47:21 +03:00
system_project.tcl	projects/common: Add system_top _project templates	2022-09-20 17:00:49 +03:00
system_top.v	Add/edit copyright and license for .v, .sv files	2023-07-11 15:17:41 +03:00
zc706_fmc_hpc.txt	projects/common: Add fmc connection files for every platform	2022-09-20 14:11:08 +03:00
zc706_fmc_lpc.txt	projects/common: Add fmc connection files for every platform	2022-09-20 14:11:08 +03:00
zc706_plddr3_adcfifo_bd.tcl	zc706/plddr3_adc|dacfifo_bd: PL DDR3 size is 1Gbyte	2019-05-06 17:17:00 +03:00
zc706_plddr3_constr.xdc	plddr3- change to board files	2017-02-22 15:22:50 -05:00
zc706_plddr3_dacfifo_bd.tcl	zc706/plddr3_adc|dacfifo_bd: PL DDR3 size is 1Gbyte	2019-05-06 17:17:00 +03:00
zc706_plddr3_mig.prj	plddr3- change to board files	2017-02-22 15:22:50 -05:00
zc706_system_bd.tcl	axi_hdmi_tx update for: ZedBoard, ZC706, ZC702, de10nano, ADRV9361-Z7035 (#897)	2022-03-29 16:51:21 +03:00
zc706_system_constr.xdc	zynq:all: fix SPI clock constraint	2019-08-09 16:39:56 +03:00