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The project top-level Makefile accept the all, clean and clean-all targets and forward them to their sub-projects. Create a common Makefile include that can be used to implement this behavior. The shared Makefile collects all sub-directories that have a Makefile and then forwards the all, clean and clean-all targets to them. This is implemented by creating virtual targets for each combination of sub-project and all, clean, clean-all targets in the form of "$project/all", ... These virtual sub-targets are then listed as the prerequisites of the project top-level Makefile targets. This means there is no longer a need to re-generate top-level Makefiles when a new project or sub-project is added. It will also allow to remove a lot of boilerplate code. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> |
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README.md
HDL Reference Designs
Analog Devices Inc. HDL libraries and projects.
Getting started
This repository supports reference designs for different Analog Devices boards based on Intel and Xilinx FPGA development boards or standalone.
Prerequisites
or
Please make sure that you have the required tool version.
How to build a project
For building a projects, you have to use the GNU Make tool. If you're a Windows user please checkout this page, to see how you can install this tool.
To build a project, checkout the latest release, after that just cd to the project that you want to build and run make:
[~]cd projects/fmcomms2/zc706
[~]make
A more comprehensive build guide can be found under the following link: https://wiki.analog.com/resources/fpga/docs/build
Software
In general all the projects have no-OS (baremetal) and a Linux support. See no-OS or Linux for more information.
Which branch should I use?
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If you want to use the most stable code base, always use the latest release branch.
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If you want to use the greatest and latest, check out the master branch.
License
In this HDL repository, there are many different and unique modules, consisting of various HDL (Verilog or VHDL) components. The individual modules are developed independently, and may be accompanied by separate and unique license terms.
The user should read each of these license terms, and understand the freedoms and responsibilities that he or she has by using this source/core.
See LICENSE for more details. The separate license files cab be found here:
Comprehensive user guide
See HDL User Guide for a more detailed guide.
Support
Feel free to ask any question at EngineerZone.