Sergiu Arpadi 297bed6721 ad7134_fmc: Change ODR signal to output ... FPGA is now generating the ODR signal using axi_pwm_gen. Both ADCs are now in slave mode.		2022-02-07 14:41:25 +02:00
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ad7134_bd.tcl	ad7134_fmc: Change ODR signal to output	2022-02-07 14:41:25 +02:00