pluto_hdl_adi/library
Laszlo Nagy 2995f78751 Revert "modified transceiver configuration files"
This reverts commit 829e4155ca.

The first element of the read chain must assume there is no valid element
in front of it.  For each element the ready signal of the transceiver should be
routed if the channel is selected either by channel number or broadcast.
When the current element is not selected it should forward the ready signal from
the previous element, however this is not the case for the first one.

Having a constant 1'b1 connected to the ready input of the first element
corrupts the first read of the first channel after a channel switch.

This change will break broadcast reads.
2021-06-25 14:15:59 +03:00
..
axi_ad5766 up_axi_update: ADDRESS_WIDTH parameter is now a localparam 2019-07-26 11:58:58 +03:00
axi_ad6676 axi_ad6676: Set data format to twos complement 2020-10-13 12:55:17 +03:00
axi_ad7616 axi_ad7616: Update ad_edge_detect port names 2020-10-28 11:31:50 +02:00
axi_ad9122 Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
axi_ad9144 Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
axi_ad9152 Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
axi_ad9162 Fix copy-paste typo in *_ip.tcl 2019-07-29 15:37:30 +03:00
axi_ad9250 Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
axi_ad9265 library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_ad9361 axi_ad9361: Fix typo in tdd interface 2021-06-14 16:50:47 +03:00
axi_ad9371 Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
axi_ad9434 Fix copy-paste typo in *_ip.tcl 2019-07-29 15:37:30 +03:00
axi_ad9467 axi_ad9467: Fix missing connection warnings 2020-09-11 10:24:22 +03:00
axi_ad9625 Fix copy-paste typo in *_ip.tcl 2019-07-29 15:37:30 +03:00
axi_ad9671 Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
axi_ad9680 Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
axi_ad9684 Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
axi_ad9739a ad_serdes_out: Add tristate option 2020-08-07 08:31:19 +03:00
axi_ad9963 axi_ad9963: Add last sample hold support 2020-11-02 15:50:12 +02:00
axi_adc_decimate axi_adc_decimate: Export signals indicating the rate 2020-08-13 07:01:19 +03:00
axi_adc_trigger axi_adc_trigger: Use valid in data delay stage 2020-08-13 07:01:19 +03:00
axi_adrv9001 axi_adrv9001: Let gate signals have initial value, useful for simulation 2021-05-26 15:44:45 +03:00
axi_adrv9009 Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
axi_clkgen library/axi_clkgen: Fix second clock output 2020-01-07 13:21:00 +02:00
axi_dac_interpolate axi_dac_interpolate: Add last sample support 2020-11-02 15:50:12 +02:00
axi_dmac Fix registers mismatches in regmap_tb from jesd 204 rx/tx and dmac 2021-05-31 16:47:12 +03:00
axi_fan_control axi_fan_control: Fixed reset bug 2020-05-08 17:07:57 +03:00
axi_fmcadc5_sync library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_generic_adc axi_generic_adc: Declare parameters before use 2020-08-31 15:58:35 +03:00
axi_gpreg makefile: Regenerate make files 2020-10-20 12:51:10 +03:00
axi_hdmi_rx library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_hdmi_tx Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
axi_i2s_adi axi_i2s_adi: create friendly xgui files 2020-08-25 09:55:31 +03:00
axi_intr_monitor library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_laser_driver Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
axi_logic_analyzer axi_logic_analyzer: Fix data width warning 2020-09-11 10:23:26 +03:00
axi_mc_controller library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_mc_current_monitor library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_mc_speed library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_pulse_gen axi_pulse_gen: Fix typo introduced in c235e5e58 2021-05-10 13:26:30 +03:00
axi_pwm_gen axi_pwm_gen: Initial commit 2021-05-07 19:09:32 +03:00
axi_rd_wr_combiner library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_spdif_rx library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_spdif_tx library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
axi_sysid Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
axi_usb_fx3 library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
cn0363 library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
common up_tdd_cntrl: Add magic value "TDDC" 2021-06-14 16:50:59 +03:00
cordic_demod library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
intel Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
interfaces xilinx:adxcvr: PRBS support 2021-01-12 13:40:42 +02:00
jesd204 Fix registers mismatches in regmap_tb from jesd 204 rx/tx and dmac 2021-05-31 16:47:12 +03:00
scripts library.mk: Update CLEAN_TARGET 2021-02-16 15:11:53 +02:00
spi_engine axi_spi_engine: almost full and almost empty is generated by the util_axis_fifo 2021-03-18 18:53:35 +02:00
sysid_rom Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
util_adcfifo Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
util_axis_fifo util_axis_fifo: Improve GUI layout in Vivado 2021-03-12 15:06:45 +02:00
util_axis_resize library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_axis_upscale library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_bsplit Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
util_cdc library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_cic library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_dacfifo Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
util_dec256sinc24b library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_delay library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_extract util_extract: Use less delays in axi_adc_trigger 2019-08-22 18:06:10 +03:00
util_fir_dec library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_fir_int library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_gmii_to_rgmii library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_i2c_mixer library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_mfifo library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_pack Testbenches: Unify and optimize HDL testbenches 2021-05-07 19:53:14 +03:00
util_pulse_gen library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_rfifo Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
util_sigma_delta_spi util_sigma_delta_spi: Fix syntax 2020-10-19 10:45:36 +03:00
util_tdd_sync library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_var_fifo library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
util_wfifo Update Quartus Prime version from 19.3.0 to 20.1.0 2021-03-08 11:29:33 +02:00
xilinx Revert "modified transceiver configuration files" 2021-06-25 14:15:59 +03:00
Makefile library:axi_adrv9001: Initial version 2020-08-24 17:49:12 +03:00