29 lines
844 B
Tcl
29 lines
844 B
Tcl
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## FIFO depth is 4Mb - 250k samples
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set adc_fifo_name axi_ad9680_fifo
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set adc_fifo_address_width 16
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set adc_data_width 128
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set adc_dma_data_width 64
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## FIFO depth is 4Mb - 250k samples
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set dac_fifo_name axi_ad9144_fifo
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set dac_fifo_address_width 15
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set dac_data_width 128
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set dac_dma_data_width 128
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## NOTE: With this configuration the #36Kb BRAM utilization is at ~70%
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source $ad_hdl_dir/projects/common/kcu105/kcu105_system_bd.tcl
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source $ad_hdl_dir/projects/common/xilinx/adcfifo_bd.tcl
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source $ad_hdl_dir/projects/common/xilinx/dacfifo_bd.tcl
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source ../common/daq2_bd.tcl
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ad_ip_parameter axi_ad9144_xcvr CONFIG.XCVR_TYPE 1
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ad_ip_parameter axi_ad9680_xcvr CONFIG.XCVR_TYPE 1
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ad_ip_parameter util_daq2_xcvr CONFIG.XCVR_TYPE 1
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ad_ip_parameter util_daq2_xcvr CONFIG.QPLL_FBDIV 20
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ad_ip_parameter util_daq2_xcvr CONFIG.QPLL_REFCLK_DIV 1
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